隨著晶片整合的技術進步，異質整合晶片的概念也早已被提出。而伴隨著不同種類的整合技術相繼而出（例如：矽中介板、嵌入式多晶片互連橋接等等），卻沒有一種合適的異質整合方法，可以涵蓋各種不同的整合方法，比如同時考慮矽中介層電路板和嵌入式多晶片互連橋接的整合方法。
在本論文中，我們首先提出一個問題，考量各個不同整合方法的優缺點和限制，來產生出一個復合型的異質整合結構 (矽中介層電路板、嵌入式多晶片互連橋接、集成扇出型封裝可同時存在於同一個結構中)。此外，單一整合方法，皆為我們提出的問題中的一種特殊情況。接著，我們提出一個效能導向的多晶片系統整合方法，此方法的目的為產生一個合適的載結構（載體結構可由幾種不同的載體組成，例如：矽中介板、封裝、嵌入式多晶片互連橋接、印刷電路板、整合型扇型封裝等等，且每個載體有其對應的整合限制）和相對應的晶片整合位置，其中晶片的分配位置需符合載體本身所具備的設計限制。我們的方法包含兩個步驟。第一個階段使用啟發式演算法，來快速地產生一個適當且品質可接受的初始結果。第二階段則是將第一階段產生的結果，以迭代的方式不斷更新載體結構，並在每個迭代中，將晶片分配問題轉換成混合式的整數線性規劃問題，來找出對應的晶片分佈位置。而我們的實驗結果證明了此方法的有效性。

With the ever-changing nature of integration technology, the concept of heterogeneous integration has been proposed for several years. Heterogeneous integration technology allows integrating separately manufactured components into a higher-level assembly. Although different types of integration technologies are provided one after another (e.g., silicon interposer, silicon bridge, etc.), there is no suitable methodology for heterogeneous integration that can consider multiple integration technologies simultaneously.
In this thesis, we first propose a problem that can cover several types of integration technologies at the same time. The problem takes into account the constraints of several integration technologies when creating a composite structure. Also, the integration structure that considers a single integration technology can be modeled by our problem. We then present a performance-driven multi-die integration methodology for the addressed problem, which aims to generate a proper signal carrier structure (that includes various types of carriers, e.g., interposer, package, printed circuit board, etc., at different levels of integration) and the corresponding assignment of dies to carriers subject to design constraints imposed on carriers. Our methodology consists of two stages. The first stage adopts a heuristic algorithm to fast produce a feasible initial solution with acceptable quality, while the second stage iteratively improves the signal carrier structure and finds the corresponding optimal die assignment based on mixed-integer linear programming. The efficacy of our methodology is demonstrated by promising experimental results.

誌謝----------------------------------------------------i
摘要----------------------------------------------------ii
Abstract------------------------------------------------iii
1 Introduction-----------------------------------------1
1.1 Motivation-----------------------------------------1
1.2 Brief Problem Description--------------------------2
1.3 Our Contributions----------------------------------4
2 Preliminaries----------------------------------------5
2.1 Problem Formulation--------------------------------5
2.2 Path Delay-----------------------------------------8
2.3 Area Constraint------------------------------------8
2.4 Stacking Constraints-------------------------------9
2.5 Cost Constraint------------------------------------9
2.6 Objective Function---------------------------------10
3 Our Methodology--------------------------------------11
3.1 Algorithm Flow-------------------------------------11
3.2 First Stage: Initial Solution Generation-----------13
3.2.1 Finding Possible Combinations--------------------15
3.2.2 Inerting EMIB Carriers---------------------------15
3.3 Second Stage: Iterative Improvement----------------20
4 Experimental Results---------------------------------25
4.1 Experiment Setup-----------------------------------25
4.2 Experimental Results-------------------------------25
5 Conclusions------------------------------------------29
Bibliography--------------------------------------------31

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