本研究志在可撓式基板上開發一道低熱預算的金屬矽化物製程以降低介面阻抗、提升電晶體開關電流比並提高整合元件的效能。現今用以降低介面阻抗所常見的鎳、鈷、鈦矽化物製程多以快速熱退火處理(RTA)作材料合成，其中最低的溫度也需攝氏四百五十度以上才能達到材料的相變化，對於耐受溫度普遍處於攝氏四百度以下的可撓式基板來說是無法負荷的製程。為符合低熱預算的要求，我們分別使用不同波長的雷射退火(λ=355 nm, 532 nm 10.6μm)搭配底層的雷射阻擋層，取代快速熱退火處理以達到不傷及可撓式基板的目的，金屬也選了製程溫度相對其他元素(鈦、鈷)較低的鎳，在材料測試中，我們成功的以波長355 nm的雷射合成了低片電阻的矽化鎳相，並以此與六吋的可撓式電晶體整合。
本論文利用雷射退火合成的矽化鎳薄膜整合上六吋可撓式電晶體的source/drain region，成功地將介面阻抗從21kΩ降至8.5kΩ，提升了可撓式電晶體的效能：電流開關比(Ion/Ioff ratio) 提升了至少3倍，場效電晶體載子遷移率提升至原本的1.5倍。不僅如此，我們也成功地改善了可撓式CMOS inverter 與 6-T SRAM的性能，CMOS inverter的電壓轉換曲線在轉換電壓(1/2 Vdd)時斜率增大許多，gain值至少提升了30%，擁有了更快的switching speed；6T- SRAM的靜態雜訊邊限(Static Noise Margin)值在Vdd=4 V的情況下從0.82V提升到了1V，擁有更好的靜態雜訊抑制能力。此項研究證明了雷射退火處理在可撓式基板上合成矽化物材料且整合元件的可行性，為提升可撓式電晶體效能提供了一個方向，較好的可撓式電晶體效能將可以增進穿戴式電子的應用與功能，是未來物聯網時代下不可或缺的一塊拼圖。

This research is dedicated to invent a low thermal budget metal silicide process on flexible substrate. A good metal silicide can help lower the contact resistance between source/drain region and metal line, raise the device Ion/Ioff ratio and improve the overall device performance. Nickel, cobalt and titanium are the common metals used for silicide synthesis and RTA(rapid thermal annealing) is the main method to form metal silicide now. However, the RTA temperature need at least 450°C to synthesize metal silicide while nearly all flexible substrates can’t afford temperature above 400°C. In this research, we try to form low resistance metal silicide by replacing RTA with PLA(pulsed-laser annealing) process and select nickel as the metal due to its low phase change temperature. Three different wavelengths of lasers are used in this study(λ=355 nm, 532 nm, 10.6 μm) and we successfully form low sheet resistance NiSi phase with ultraviolet laser(λ=355 nm) without damage the polyimide substrate.
The contact resistance of 6-inches flexible transistor is lowered from 21kΩ to 8.5kΩ after integrating the PLA nickel-silicide onto the source/drain region. The Ion/Ioff ratio increase at least 3 times and the filed effect mobility increase by 50% after integration. We also improve the voltage gain of CMOS-inverter by at least 30%, make it have faster switching speed. The static noise margin (SNM) of 6T-SRAM is elevated from 0.82V to 1V at Vdd=4V. This research proves the feasibility of using laser annealing process to synthesize low thermal budget NiSi on flexible substrate. The successful integration with 6-inches flexible device provide a new way to improved the performance of flexible devices. Better performance of flexible transistor can improve the application and function of wearable electronics. The wearable electronics will be an important part of the IoTs generation.

中文摘要 i
ABSTRACT ii
誌謝 iii
Table of Contents v
List of Figures viii
List of Tables xii
Chapter 1 Introduction 1
1.1 Flexible electronics 1
1.2 Low thermal budget techniques on flexible substrate 2
1.3 Research motivation 3
Chapter 2 Literature review 4
2.1 Flexible thin film transistor 4
2.1.1 Device transfer-Spalling Technology 4
2.1.2 Direct fabrication-Laser lift-off(LLO) 4
2.1.3 Flexible substrate 5
2-2 Metal silicide 7
Chapter 3 Experimental and Analytical Instruments 13
3.1 Process instruments 13
3.1.1 Plasma-enhanced Chemical Vapor Deposition (PECVD) 13
3.1.2 Pulsed laser system 14
3.1.3 Automated Double Side Nano Imprint Lithography System 15
3.1.4 Chemical Mechanical Polishing 17
3.2 Analytical instruments 18
3.2.1 Raman spectrum analysis 18
3.2.2 X-Ray Diffraction (XRD) 18
3.2.3 X-ray photoelectron spectroscopy(XPS) 19
3.2.4 Nano Device Parameter Measurement System 19
Chapter 4 Experimental Process 21
4.1 Flexible FET process with high-κ metal gate 21
4.1.1 Large area polyimide substrate fabrication and improvement 21
4.1.2 Device directly fabricated on PI substrate 22
4.2 Nickel Silicide synthesis on flexible substrate 27
4.2.1 Sample preparation 27
4.2.2 Laser annealing and unreacted metal removal 27
4.3 Integration flow 28
4.3.1 Salicide and Local silicidation 28
4.4 Peel-off process 29
4.4.1 UV tape and Supporting film adhesion 29
4.4.2 UV light exposure 30
Chapter 5 Results and Discussion 31
5.1 Nickel silicide by pulsed laser annealing 31
5.1.1 Sheet resistance of different laser annealing process 31
5.1.2 Material Analysis 33
5.2 Device performance after integration 37
5.2.1 I-V electrical analysis 37
5.2.2 electrical properties extracted from I-V characteristic 38
5.3 CMOS-Inverters and 6T-SRAMs performance 42
5.3.1 CMOS-inverter 42
5.3.2 6T-SRAM(4N2P) 43
5.4 Device reliability 46
5.4.1 Hot carrier stress effect 46
5.4.2 Device bending reliability 49
5.5 Gate metal modulation for Vth symmetry 53
Chapter 6 Conclusion and Future work 56
6.1 Conclusion 56
6.2 Future work 56
References 58

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