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作者(中文):瞿子茗
作者(外文):Chu, Tzu-Ming
論文名稱(中文):以多種方式降低矽鍺通道氧化鉿鋯鐵電鰭式電晶體的次臨界斜率之研究
論文名稱(外文):Study of Various Methods for Reducing Subthreshold Slope of Silicon-Germanium HfZrO2 Ferroelectric Fin Field-Effect-Transistor
指導教授(中文):吳永俊
指導教授(外文):Wu, Yung-Chun
口試委員(中文):侯福居
朱鵬維
口試委員(外文):Hou, Fu-Ju
Chu, Peng-Wei
學位類別:碩士
校院名稱:國立清華大學
系所名稱:工程與系統科學系
學號:107011563
出版年(民國):109
畢業學年度:109
語文別:英文
論文頁數:62
中文關鍵詞:矽鍺氧化鉿鋯鐵電鰭式場效電晶體次臨界斜率電漿超臨界流體
外文關鍵詞:Silicon-germanium (SiGe)Hafnium zirconium oxide (HZO)FerroelectricFinFETPlasmaSupercritical fluid (SCF)
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  現今於半導體元件尺寸的微縮上面臨到嚴峻的挑戰,為了能夠克服於微縮過程中所遇到的困難,除了在尺寸進行更動外,可藉由材料的改變亦或是元件後處理,以提升元件之電特性。近年來,鐵電材料(Ferroelectric, FE)被廣泛地運用於元件上,其鐵電效應能使元件的次臨界斜率突破物理限制60mV/decade,進而朝向低功耗、高效能之目標邁進一大步。
  本篇論文將提到在絕緣矽基板(Silicon-on-insulator, SOI)上製作矽鍺通道(Si1-xGex, x = 0.2)之n型(n-type)與p型(p-type)鐵電鰭式場效電晶體(Fe-FinFET),將鐵電材料氧化鉿鋯(HZO)作為閘極氧化層,並提出改善矽鍺鐵電鰭式電晶體的次臨界斜率之方式。其中,n-type Si0.8Ge0.2 Fe-FinFET使用氮化鈦(TiN)與氮化鉭(TaN)作為金屬閘極(Metal Gate, MK),進一步討論電極材料上的差異對於元件的次臨界斜率之影響。其中,在使用氮化鈦作為閘極的情況下,與對照組n-type Si Fe-FinFET相比,n-type Si0.8Ge0.2 Fe-FinFET的ID-VG特性曲線顯示出其具有較高的開關電流比(On/Off current ratio, ION/IOFF)以及較佳汲極引至能障下降(DIBL)之現象,並且擁有較低的閘極誘導汲極漏電流(GIDL)。而相較於使用氮化鈦,以氮化鉭作為閘極之n-type Si0.8Ge0.2 Fe-FinFET擁有低於60mV/decade的SS值。再者,針對p-type Si0.8Ge0.2 Fe-FinFET,分別對元件進行電漿與超臨界流體(Supercritical Fluid, SCF)之製程處理,藉此修補元件內部材料之缺陷,並討論次臨界斜率於處理前後之變化。從電特性曲線圖中可觀察到,無論是藉由氨電漿、氫電漿亦或是氫氣超臨界流體處理,其SSmin值均能下降至低於60mV/decade,並且能改善輸出電流。
  此研究中的矽鍺通道鐵電鰭式電晶體,除了本身擁有良好的特性與簡易的製程外,仍能藉由電極材料改變、電漿處理及超臨界流體處理,進一步優化元件之特性,藉此因應未來元件在微縮上所遇到的困難,並於其中扮演重要的角色。
  Nowadays, there are severe challenges in the size scaling of semiconductor devices. To overcome the difficulties encountered in the process of scaling, in addition to changing the size, replacing the materials or post-processing of the devices also can be used to improve the electrical characteristics of the devices. In recent years, ferroelectric materials have been widely used in devices, and the ferroelectric effect can make the subthreshold slope (SS) of the device break the physical limit of 60mV/decade, and then take a big stride forward the goal of low power consumption and high performance.
  In this study, it will mention that fin field-effect-transistor (FinFET) with silicon-germanium channel (Si1-xGex, x = 0.2) fabricated on silicon-on-insulator (SOI) wafer with n-type and p-type. Also, the ferroelectric material HfZrO2 (hafnium zirconium oxide, HZO) as the gate oxide layer, and proposes a way to improve the SS of the Si0.8Ge0.2 Fe-FinFET. Among them, the n-type Si0.8Ge0.2 Fe-FinFET uses titanium nitride (TiN) and tantalum nitride (TaN) as the metal gate (Metal Gate, MK), and further discusses the influence of changing electrode materials on the SS.
Among them, in the case of using TiN as MK, compared with the n-type Si Fe-FinFET, the ID-VG characteristic curve of n-type Si0.8Ge0.2 Fe-FinFET shows that it possesses a higher On/Off current ratio (ION/IOFF) and better drain-induced-barrier-lowering (DIBL) phenomenon, and have lower gate induced drain leakage (GIDL). Compared with the use of TiN, the n-type Si0.8Ge0.2 Fe-FinFET with TaN as the gate electrode has an SS value lower than 60mV/decade. Furthermore, for the p-type Si0.8Ge0.2 Fe-FinFET, the device is processed by plasma and supercritical fluid (SCF) treatments to repair the defects of the internal material of the device, and discuss the improvement of the SS before and after treatment. It can be observed from the electrical characteristic of the device that whether it is treated by ammonia plasma (NH3), hydrogen plasma (H2) or hydrogen SCF, the SSmin value of the device can be reduced to less than 60mV/decade, and its output can be slightly increased.
  The Si0.8Ge0.2 channel Fe-FinFET in this study not only has good characteristics and simple manufacturing process, but also can further optimize the characteristics of the device through electrode material change, plasma treatment, and SCF treatment. This corresponds to the difficulties encountered in the scaling of future devices and plays an important role in it.
中文摘要 i
Abstract iii
Acknowledge v
Contents vi
Table Captions viii
Figure Captions viii
Chapter 1 1
Introduction 1
1.1 Moore’s Law 1
1.2 High Mobility Channel Material 3
1.3 Introduction of Silicon-on-insulator Fin Field-Effect Transistor 5
1.3.1 Basic structure of Fin Field-Effect Transistor 6
1.3.2 SOI Fin Field-Effect Transistor 6
1.4 Silicon-Germanium Based Field-Effect Transistor 7
1.5 Introduction of Ferroelectric Field-Effect Transistor 9
1.6 Motivation 15
1.7 Organization of the Thesis 22
Chapter 2 23
The principle of Fe-FinFET 23
2.1 Basic Principle of Conventional MOSFET 23
2.2 The Parameter Extraction for MOSFET 25
A. Threshold Voltage (Vth) 25
B. Subthreshold Slope (SS) 26
C. On/Off Current Ratio (ION/IOFF) 26
D. Drain Induced Barrier Lowering (DIBL) 27
2.3 The principle of Ferroelectric Field-Effect Transistor 29
Chapter 3 32
Silicon-Germanium Ferroelectric Fin Field-Effect Transistor 32
3.1 Device Fabrication and Structure 32
3.2 Device Inspection and Analysis 37
Chapter 4 41
The Electrical Characteristic Analysis of Device 41
4.1 n-type Si0.8Ge0.2 Fe-FinFET with different electrode material 41
4.2 p-type Si0.8Ge0.2 Fe-FinFET with plasma treatment 48
4.2.1 p-type Si0.8Ge0.2 Fe-FinFET with the NH3 plasma treatment 48
4.2.2 p-type Si0.8Ge0.2 Fe-FinFET with the H2 plasma treatment 51
4.3 p-type Si0.8Ge0.2 Fe-FinFET with H2 SCF treatment 54
4.4 Summary of p-type Si0.8Ge0.2 Fe-FinFET with plasma & SCF treatment 57
Chapter 5 59
Conclusion 59
Reference 60
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