為了因應消費者對於電子產品的需求，封裝技術已由覆晶封裝轉變為三維立體封裝，其使用的微型焊錫球與矽穿孔技術，可望在提高效能的同時減少封裝體積。但在3D IC技術中仍面臨著許多挑戰，包括散熱與製程良率問題，故業界還發展出一2.5D IC技術做為2D IC與3D IC間的過渡產品。2.5D構裝技術主要是在覆晶(Flip Chip)晶片與基板中間加入一層矽中介層(interposer)以整合中介層上層位於同一平面的不同晶片，以達到異質整合(heterogeneous integration)。但由於矽中介層的導熱良好，將通電中的晶片焦耳熱傳到未通電的晶片下方(thermal cross-talk)，因此而建立了溫度梯度，產生熱遷移破壞，使得未通電的晶片也會產生可靠度的問題。
此外，2.5D/3D IC 皆採用銅柱凸塊(copper pillar bump, CPB)技術的微接點(microbumps)來連接晶片與中介層/基板，其相對更厚的金屬墊層使其有更高的電遷移抗性可以承受更高的電流密度，但焊錫層體積的銳減卻也造成更多的問題，如形成全金屬間化合物的銲錫層與側壁反應(side wall reaction)等……。
本實驗中的2.5D立體封裝結構試片在150°C的環境下施加1.5×104 A/cm2的高電流密度架設電遷移測試，以了解電遷移對於微接點的影響以及其破壞機制與微結構的變化，並在2.5D立體封裝結構中相鄰未通電的晶片中發現熱遷移行為。微接點銲錫層中的錫原子在溫度梯度下沿著鎳墊層與銅柱的表面擴散並形成Ni3Sn4與Cu3Sn，而銲錫層中流失的錫原子將造成頸縮或孔洞，使得在2.5封裝中，未通電晶片具有比通電晶片更大的可靠度問題。

In order to deal with the requirements of consumer electronic products, the package technology have currently transited from flip chip technology (FC) to three-dimensional integrated circuits (3D ICs). In it, micro bumps and through silicon via (TSV) are employed for further demands on higher performance and rather smaller size of packaging. But there are still many challenges in 3D ICs technology, including heat dissipation and process yield issues. Therefore, the industry has developed a technology called 2.5D ICs as a transition product between 2D IC and 3D IC. The 2.5D ICs technology can integrate the different chip placed horizontally on a Si interposer which between the FC chip and the substrate to achieve heterogeneous integration. Because of the good thermal conductivity of the silicon interposer, the Joule heat of the powered chip can transfer to the adjacent unpowered chip by silicon interposer, which temperature gradient can established to cause the thermal migration damage, and make the unpowered chip also has reliability issue.
Otherwise, microbumps have been adopted as the vertical interconnects between chips and interposer. Volume of solder decrease dramatically, and many issues about reliability arise, including the full IMC joints and necking or voiding induced by side wall reaction around the UBM.
In this study, an electromigration-induced failure was investigated under a current density of 5.4×〖10〗^4 A/〖cm〗^2 at 150°C. However, the micro joints in the neighboring un-powered chip has more serious thermomigration-induced failure because Sn atoms tend to migrate along the surface of Ni/Cu metallization under temperature gradient, and form Ni3Sn4 and Cu3Sn IMCs at side wall respectively. When the Sn diffuses away from solders, necking or significant voids formation occurs in the solder layer of micro bumps, which weakening the electrical and mechanical properties. Thus this new thermomigration-induced failure mode will become even significantly in micro joint for 2.5D-IC packaging.

摘要 I
Abstract II
致謝 IV
目錄 V
圖目錄 VIII
表目錄 XIV
一、 前言 1
二、 文獻回顧 5
2.1 介面反應 5
2.1.1 Cu/Sn、Ni/Sn與Au/Sn二元系統 5
2.1.2 Cu/Sn/Ni三元系統 7
2.2 電遷移 11
2.2.1 電遷移理論 11
2.2.2 銲錫接點中的電遷移破壞模式 13
2.3 熱遷移 17
2.3.1焦耳熱效應 17
2.3.3熱遷移理論 19
2.3.4 焊錫接點中的熱遷移現象 20
2.4 銲錫接點微縮 27
2.4.1背向應力 28
2.4.2β錫之非等向性擴散 30
2.4.3 Full IMC接點 31
2.4.4側壁反應(side-wall reaction) 32
三、 試片結構與實驗方法 39
3.1 試片結構 39
3.2 實驗方法 41
3.3試片處理與分析 44
3.3.1焦耳熱量測 44
3.3.2試片微結構觀察與分析 45
3.4 ANSYS WORKBENCH 有限元素分析法 47
四、 實驗結果 48
4.1 焦耳熱的量測與模擬 48
4.1.1焦耳熱量測 48
4.1.2 ANSYS有限元素分析法模擬電流密度分佈 49
4.1.3 ANSYS有限元素分析法模擬2.5D封裝中thermal cross-talk 51
4.2 Cu/Ni/Cu/Sn/Ni/Cu非對稱結構在165℃等溫熱處理下之界面反應 54
4.3全IMC微接點電遷移破壞 62
4.4 2.5D封裝中由thermal cross-talk所造成的熱遷移 68
4.5 Ni/Cu/Sn/Ni非對稱結構在200℃/225℃等溫熱處理下之界面反應 74
五、 問題與討論 76
5.1 其他驅動力對Ni/Cu/Sn/Ni非對稱結構界面反應的影響 76
5.2 側壁反應與頸縮、孔洞 79
5.3 影響側壁反應的因素 83
六、 結論 92
References 94

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