本論文著重於模擬4H型碳化矽垂直型雙佈植金氧半場效電晶體(VDMOSFET)在寄生效應下雙脈衝測試(DPT)的切換特性。第一步是通過靜態特性的量測與校準建立一個為了模擬元件在市售TO-247封裝的模型，透過與可用產品的規格表比較來確認模型的參數，藉由調整4H-SiC MOSFETs 的channel mobility將順向特性校準至與量測值間的誤差少於10%，而垂直型元件之反向崩潰電壓主要由漂移區厚度控制，確認模擬與量測的崩潰電壓皆超過1200V，電容校準是動態特性中最重要的，像是快速切換和能量損失，最終在汲極-源極電壓(VDS)大於10V時，將Ciss和Coss的誤差縮小至10%內。
DPT的模擬由TCAD的Mixed-mode模擬執行，探討Rg與寄生電感對切換瞬間的影響，模擬結果顯示Lg對波型影響不大、Ld影響元件開啟特性而Ls嚴重增加元件開關時能量損耗，接下來並聯元件的模擬是為了仿照在寄生電感效應下高功率模組的大電流應用，切換期間電流不平衡流動於元件間的情況能夠被發現和研究。

This paper focuses on simulation of the switching characteristics of 4H-SiC VDMOSFET in double pulse test (DPT) under parasitic inductance effects. The first step is setting up a model for simulated devices in commercial TO-247 packages through the measurement and calibration of static characteristics. The model parameters are confirmed through comparison with the data sheet of an available product. The forward characteristics are calibrated in an error less than 10% of the measured value by modifying the channel mobility of 4H-SiC MOSFETs. The reverse breakdown voltage of the vertical devices is mainly controlled by the thickness of drift region. It is confirmed that the breakdown voltage exceeds 1200V both in simulation and measurement. Capacitance calibration is the most important for dynamic characteristics such as fast switching and energy losses. Finally, the error of Ciss and Coss are calibrated to less than 10% when VDS exceeds 10V.
The DPT simulation under the effects of Rg and parasitic inductance is performed by mixed-mode simulation in TCAD. The simulation results show that Lg affects switching waveforms not very much, and Ld primarily affect turn-on characteristics. But Ls seriously increases switching energy loss. Then devices in parallel to emulate large current applications in high power modules under parasitic inductances effects is simulated. In this case, the current imbalanced during switching between devices can be observed and studied.

摘要................................I
Abstract............................II
目錄.................................III
圖目錄...............................V
表目錄...............................VIII
第一章 序論..........................1
1.1研究動機..........................1
1.2論文大綱..........................2
1.3寬能隙材料―4H-碳化矽 (4H-SiC)......2
1.4文獻回顧..........................3
1.4.1 元件基本原理....................3
1.4.2 切換特性.......................8
1.4.2.1 元件基本切換特性..............8
1.4.2.2 雙脈衝波切換特性..............12
第二章 元件結構與特性校準模擬...........14
2.1 元件結構模擬......................14
2.2 靜態特性與動態特性校正模擬..........16
2.2.1量測校正與結果....................16
2.2.2量測與模擬電性結果校正.............22
第三章 雙脈衝測試切換模擬...............35
3.1 Mixed-mode介紹....................35
3.2 模擬結果...........................35
3.2.1 調變Rg速度的影響..................36
3.2.2 寄生效應對於切換特性的影響.........41
3.2.3 並聯元件對電流平衡的影響...........50
第四章 結論與未來展望....................56
參考文獻................................58

[1] B. J. Baliga, Fundamentals of Power Semiconductor Devices, New York: Springer, 2008
[2] B. J. Baliga, Advanced Power MOSFET Concepts, New York: Springer, 2010
[3] P. Ganesan, R. Manju, K. R. Razila and R. Vijayan, “Characterisation of 1200V, 35A SiC MOSFET using Double Pulse Circuit,” in Power Electronics Drives and Energy Systems, 2016.
[4] R. Nakamura, Y. Nakano, M. Aketa, K. Noriaki and K. Ino, “1200V 4H-SiC Trench Devices,” in International Exhibition and Conference for Power Electronics, Intelligent Motion, Renewable Energy and Energy Management, 2014.
[5] R. Fu, A. Grekov, J. Hudgins, A. Mantooth, E. Santi, “Power SiC DMOSFET model accounting for nonuniform current distribution in JFET region”, IEEE Trans. Ind. Appl., vol. 48, no. 1, pp. 181-190, Jan./Feb. 2012
[6] R. Kraus, A. Castellazzi, “A Physics-Based Compact Model of SiC Power MOSFETs”, IEEE Trans. on Power Electronics, vol. 31, no. 8, Aug. 2016.
[7] K. Fischer, K. Shenai, “Dynamics of power MOSFET switching under unclamped inductive loading conditions”, IEEE Trans. Electron Devices, vol. 43, pp. 1007-1015, Jun. 1996.
[8] X. Fang, “Characterization and Modeling of SiC Power MOSFETs,”
Thesis, the Ohio State University, 2012.
[9] A. Anthon, J. Hernandez, Z. Zhang, M. Andersen, “Switching investigations on a SiC MOSFET in a TO-247 package”, proc. of IEEE industrial Electronics Conference, 2014.
[10] A. Nishigaki, H. Umegami, F. Hattori, W. Martinez and M. Yamamoto, “An analysis of false turn-on mechanism on power devices,” in Proc.Energy Conversion Congr. Expo. , pp. 2988–2993, Sept. 2014.
[11] Synopsys, Sentaurus™ Process User Guide Version L-2016.03, March 2016.
[12] Agilent technologies, Direct Power MOSFET Capacitance measurement at 3000V, Application Note B1505A, 2011.
[13] C. Lombardi, S. Manzini, A. Saporito, and M. Vanzi, “A physically
based mobility model for numerical simulation of nonplanar devices,” IEEE Trans. on Computer-Aided Design, vol. 7, no. 11, pp. 1164-1171, 1988.
[14] H. Linewih, S. Dimitrijev, "Channel-carrier mobility parameters for 4H-SiC MOSFETs", Proc. MIEL, vol. 2, pp. 425-430, 2002.
[15] Synopsys, Sentaurus™ Device User Guide Version L-2016.03, March 2016.
[16] J. Brown, “Power MOSFET Basics: Understanding Gate Charge and Using it to Assess Switching Performance”, Vishay application note AN608, Dec. 2004.
[17] Z. Chen, D. Boroyevich, R. Burgos, “Experimental parametric study of the parasitic inductance influence on MOSFET switching characteristics”, International Power Electronics Conference (IPEC), pp. 164-169, 2010.
[18] C. Hui, Y. Yang, Y. Xue, Y. Wen, “Research on current sharing method of SiC MOSFET parallel modules”, Proc. IEEE Int. Conf. Electron Devices Solid State Circuits (EDSSC), pp. 1-2, Jun. 2018.