隨著半導體技術蓬勃發展，電子產品尺寸日漸縮小，效能卻能增加，這全都有賴於「摩爾定律」。然而，在傳統半導體架構中，元件的微縮已將近物理極限，眼看摩爾定律的發展遇到瓶頸，因此，許多科學家致力於研發新的方法，其中，二維材料就是一個強而有力的候選之一，他擁有次奈米等級的厚度，以及獨特的電性、光學特性，使得二維材料成為運用於次世代電晶體的理想材料，可直接與矽競爭。
本論文主要藉由沉積銦(In)當摻雜層的層狀硒化銦（InSe）場效應晶體（FET）使得電子遷移率在室溫下可高達3700〖cm〗^2 V^(-1) s^(-1)，並且在一個月後還能夠保有60%的電子遷移率。此外，由於沉積銦在硒化銦和金電極中間，也改善了接觸電阻，這和低頻雜訊分析結果一致。然而，由於InSe對於氧的反應非常敏感,將元件放在大氣下,並且給定閘極電壓，InSe的表面產生氧化層，而氧化層與InSe之間存在缺陷使得載子被捕捉，造成電滯現象，基於此電滯現象，我們將它運用做為非揮發性記憶體，不像傳統非揮發性記憶體需要繁雜的氧化層製程，就能達到相同的記憶體特性。沉積銦當摻雜層的層狀硒化銦場效應晶體展現了高電子遷移率、高電流開關比、相當大的遲滯窗口、穩定的儲存時間，提供了一個可靠的方法使用二維材料做成記憶體元件。

With the rapid development of semiconductor technology, the size of electronic products scale down but efficiency can be increased, all of which depend on "Moore's Law." However, in the traditional semiconductor architecture, the shrinkage of devices has approached the physical limit, and the development of Moore's Law has encountered bottlenecks. Therefore, many scientists are working on developing new path. Among them, two-diementional materials is one of the strong candidates. They have sub-nano-grade thickness, as well as unique electrical and optical properties, making two-dimensional materials an ideal material for the next generation of transistors, which can compete directly with silicon.
A layered indium selenide (InSe) field‐effect transistor (FET) with superior controlled stability is demonstrated by depositing an indium (In) doping layer. The electron mobility can be as high as 3700〖cm〗^2 V^(-1) s^(-1) at room temperature, and can be retained with 60% after one month. In addition, since the deposited indium is between the indium selenide and Au electrodes, the contact resistance is also improved, which is consistent with the low frequency noise analysis result. However, since InSe is very sensitive to oxygen, when the device is placed under air, then given the gate voltage, the surface of the InSe and the doped indium structure become InO_x, causing an oxide layer on the surface. There are defects on the interface of the oxide layer and InSe, which cause the carrier be captured, resulting in hysteresis. Based on the hysteresis, we use it as a non-volatile memory. Unlike traditional non-volatile memory, which requires a complicated oxide layer process, but the same memory characteristics can be achieved. A layered indium selenide field effect transistor by depositing an indium doping layer exhibits high electron mobility, 〖10〗^5 on/off ratio, large hysteresis window, stable retention, and provides a reliable path to utilize two-dimensional materials to memory device.

致謝詞 I
摘要 II
ABSTRACT III
目次 V
圖目次 VII
表目次 X
第一章 序論 1
1.1 研究背景 1
1.2 研究動機 2
1.3 論文大綱 3
第二章 文獻回顧 4
2.1 二維材料 (TWO-DIMENSIONAL MATERIALS) 4
2.1.1 硒化銦(InSe) 5
2.2 二維材料電晶體 7
2.2.1 硒化銦電晶體(InSe FET) 8
2.2.2 二維材料元件接觸探討 9
2.2.3 The Y Function Method (YFM) 10
2.3 二維材料應用於記憶體 12
2.4 材料物性分析 16
2.4.1 掃描式電子顯微鏡(Scanning Electron Microscopy) 16
2.4.2 低頻雜訊(Low Frequency Noise, LFN) 17
2.4.2.1 熱雜訊(Thermal Noise) 18
2.4.2.2 散粒雜訊(Shot Noise) 19
2.4.2.3 生成與複合雜訊(generation-recombination noise, g-r noise) 20
2.4.2.4 閃爍雜訊(Flicker Noise) 21
2.4.3 穿透式電子顯微鏡(Transmission electron microscope) 27
第三章 元件製程與分析 28
3.1 元件製程 28
3.2 量測設備 29
3.3 元件特性與分析 31
3.3.1 硒化銦電晶體表面鍍銦對元件特性之影響 31
3.3.2 不同氣體氛圍環境對元件特性之影響 35
3.3.3 低頻雜訊分析 38
3.3.4 掃描式電子顯微鏡分析 42
3.3.5 穿透式電子顯微鏡分析 43
第四章 硒化銦場效電晶體應用於記憶體 46
4.1 硒化銦記憶體之基本電性 46
4.2 硒化銦記憶體特性分析 48
4.2.1 脈衝(Pulse)量測 49
4.2.2 耐久性(Endurance)量測 50
4.2.3 儲存時間(Retention time)量測 51
4.2.4 記憶體操作速度量測 52
4.2.5 硒化銦記憶體元件之邏輯電路應用 53
第五章 總結 55
5.1 結論 55
5.2 未來展望 56
參考文獻 57

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