|
[1] P.-S. Chiu, Placement Legalization for Designs with Mixed-Height Cells and Rows," Master's thesis, National Tsing Hua University, Hsinchu, Taiwan, 2019. [2] W. Chow, C. Pui, and E. F. Y. Young, Legalization algorithm for multiple row height standard cell design," in Proc. of Design Automation Conference, pp. 83:1-83:6, 2016. [3] S.-H. Baek, H.-Y. Kim, Y.-K. Lee, D.-Y. Jin, S.-C. Park, and J.-D. Cho, Ultrahigh density standard cell library using multi-height cell structure," in Proc. of SPIE - The International Society for Optical Engineering, 2008. [4] P. Spindler, U. Schlichtmann, and F. M. Johannes, Abacus: Fast legalization of standard cell circuits with minimal movement," in Proc. of International Symposium on Physical Design, pp. 47-53, 2008. [5] C. Wang, Y. Wu, J. Chen, Y.-W. Chang, S. Kuo, W. Zhu, and G. Fan, An effective legalization algorithm for mixed-cell-height standard cells," in Proc. of Asia and South Pacic Design Automation Conference, pp. 450-455, 2017. [6] Y. Lin, B. Yu, X. Xu, J.-R. Gao, N. Viswanathan, W.-H. Liu, Z. Li, C. J. Alpert, and D. Z. Pan, Mrdp: Multiple-row detailed placement of heterogeneous-sized cells for advanced nodes," in Proc. of International Conference on Computer-Aided Design, pp. 7:1-7:8, 2016. [7] H. Li, W.-K. Chow, G. Chen, E. F. Y. Young, and B. Yu, Routability-driven and fence-aware legalization for mixed-cell-height circuits," in Proc. of Design Automation Conference, pp. 150:1-150:6, 2018. [8] J. Chen, Z. Zhu, W. Zhu, and Y.-W. Chang, Toward optimal legalization for mixed-cell-height circuit designs," in Proc. of Design Automation Conference, pp. 52:1-52:6, 2017. [9] C.-Y. Hung, P.-Y. Chou, and W.-K. Mak, Mixed-cell-height standard cell placement legalization," in Proc. of Great Lakes Symposium on VLSI, pp. 149-154, 2017. [10] S. Goto, An effcient algorithm for the two-dimensional placement problem in electrical circuit layout," IEEE Transactions on Circuits and Systems, vol. 28, no. 1, pp. 12-18, 1981. [11] LLC, Gurobi Optimization, Gurobi optimizer reference manual," 2018. [12] D. Leonardo and M. Ramesh, Openmp: An industry-standard api for shared-memory programming," IEEE Computational Science and Engineering, vol. 5, no. 1, pp. 46-55, 1998. [13] I. S. Bustany, D. Chinnery, J. R. Shinnerl, and V. Yutsis, \Ispd 2015 benchmarks with fence regions and routing blockages for detailed-routing-driven placement," in Proc. of International Symposium on Physical Design, pp. 157-164, 2015. [14] C. Huang, H. Lee, B. Lin, S. Yang, C. Chang, S. Chen, Y. Chang, T. Chen, and I. Bustany, Ntuplace4dr: A detailed-routing-driven placer for mixed-size circuit designs with technology and region constraints," IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 37, pp. 669-681, March 2018. |