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作者(中文):張原嘉
作者(外文):Chang, Yuan-Chia.
論文名稱(中文):用於印刷電路板之非關鍵訊號線的全域繞線器
論文名稱(外文):A PCB Global Router for Non-critical Nets
指導教授(中文):王廷基
指導教授(外文):Wang, Ting-Chi
口試委員(中文):麥偉基
陳宏明
口試委員(外文):Mak, Wai-Kei
Chen, Hung-Ming
學位類別:碩士
校院名稱:國立清華大學
系所名稱:資訊工程學系
學號:106062530
出版年(民國):108
畢業學年度:108
語文別:英文
論文頁數:29
中文關鍵詞:全域繞線器印刷電路板
外文關鍵詞:Global RoutingPrinted Circuit Board
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在設計印刷電路板時,繞線過程中的全域繞線扮演關鍵角色,而繞線資源估計的準確性則會大幅影響全域繞線結果的好壞。在本篇論文中,我們提出了一個在有限的繞線資源情形下,針對印刷電路板中非關鍵訊號線的全域繞線器。此外,我們還研究了在初始繞線階段和優化階段中,用來決定繞線順序之繞線成本的設計概念。實驗結果顯示,與手工繞線相比,我們的全域繞線器在繞非關鍵訊號線時,可縮短完成時間且同時維持平均八成五的繞線完成率。
Global routing plays an important role in the routing process when designing
printed circuit boards (PCBs). The accuracy of routing resources estimation
greatly affects the quality of global routing results. In this thesis, we propose
a global router focusing on non-critical nets in PCBs when the limited routing
resources are present. Furthermore, we discuss the design concept of routing cost
which determines the routing order in the initial routing stage and refinement stage
of our router. Our experiments demonstrate that when compared with manual
routing, our global router achieves improvement in completion time while keeping
at least 85% routing completion rates.
1 Introduction 1
1.1 PCB and PCB Routing . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.2 Previous Works . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
1.3 Problem Description . . . . . . . . . . . . . . . . . . . . . . . . . . 4
1.4 Our Contributions . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
1.5 Thesis Organization . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2 Overall Flow of Our Router and Routing Graph Construction
Stage 8
2.1 Overall Flow of Our Global Router . . . . . . . . . . . . . . . . . . 8
2.2 Routing Graph Construction Stage . . . . . . . . . . . . . . . . . . 9
2.2.1 Global Cells Construction . . . . . . . . . . . . . . . . . . . 9
2.2.2 Local Pin Pairs Identification . . . . . . . . . . . . . . . . . 9
2.2.3 Attribute Setting of Routing Graph . . . . . . . . . . . . . . 10
3 Initial Routing and Refinement Stages 13
3.1 Initial Routing Stage . . . . . . . . . . . . . . . . . . . . . . . . . . 13
3.2 Refinement Stage . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
3.2.1 Rip-up and Reroute Ordering Determination . . . . . . . . . 15
3.2.2 Pin Pair Cost Update . . . . . . . . . . . . . . . . . . . . . 16
ii
4 Experimental Results 18
5 Conclusion 27
References 28
1. W. Kumtong, P. Danklang, and W. Sriborrirux, “Pin set sequence selection
guideline routing for printed circuit board routing,” in Proc. of International
Conference Knowledge and Smart Technology, pp. 126–130, 2015.
2. Cadence Allegro. https://www.cadence.com.
3. Mentor Graphics Pads. https://www.mentor.com/.
4. T. Yan, Q. Ma, and M. D. Wong, “Advances in pcb routing,” in IPSJ Trans
actions on System LSI Design Methodology, vol. 5, pp. 14–22, 2012.
5. S. Lei and W.K.Mak, “Simultaneous constrained pin assignment and escape
routing for fpga-pcb codesign,” in Proc. of International Conference on Field
Programmable Logic and Applications, pp. 435–440, 2011.
6. T. Yan and M. D. Wong, “A correct network flow model for escape routing,”
in Proc. of Design Automation Conference, pp. 332–335, 2009.
7. L. Luo and M. D. F. Wong, “Ordered escape routing based on boolean satis
fiability,” in Proc. of Asia and South Pacific Design Automation Conference,
pp. 244–249, 2008.
28
8. C.-Y. Chin and H.-M. Chen, “Simultaneous escape routing on multiple com
ponents for dense pcbs,” in Proc. of IEEE Electrical Design of Advanced
Packaging Systems Symposium, pp. 138–141, 2013.
9. M. Ozdal and M. Wong, “Length-matching routing for high-speed printed cir
cuit boards,” in Proc. of International Conference on Computer Aided Design,
pp. 394–400, 2003.
10. J.-T. Yan and Z.-W. Chen, “Obstacle-aware length-matching bus routing,”
in Proc. of International Symposium on Physical design, pp. 61–68, 2011.
11. M. M. Ozdal and M. D. F. Wong, “Archer: A history-driven global routing
algorith,” in Proc. of International Conference on Computer-Aided Design,
pp. 488–495, 2007.
12. Y.-J. Chang, Y.-T. Lee, and T.-C. Wang, “Nthu-route 2.0: A fast and sta
ble global router,” in Proc. of International Conference on Computer-Aided
Design, pp. 338–343, 2008.
13. L.-T. Wang, Y.-W. Chang, and K.-T. T. Cheng, eds., Electronic Design Au
tomation. Morgan Kaufmann, 2009.
 
 
 
 
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