隨著工具機產業對於高精度、低成本的產品需求迅速提升，國內在開發具提升整機精度之低成本、高值化位置回授系統之技術仍處落後地位。硬體製造面而言，國內已有相當水準開發出穩定場強、公差極小的磁性量測系統，與國外商品比較，硬體規格已相當；惟後端處理的部分，無法提升位置解析度、精度及因應可能較差的量測環境的能力，無法大幅提升本國與國外產品的競爭力。
本研究目標在於開發應用於磁性量測系統之訊號處理系統，針對應用於位置細分割前的正交訊號修正，提出鎖相迴路為基本架構之數位濾波方法，並針對每個環節進行頻域響應分析以及輸出訊號的頻譜分析。為避免直接以即時系統進行訊號處理開發可能無法分離運算中可能帶來無法辨識之誤差，前端研究先以Simulink環境進行訊號處理系統之暫態分析模擬，以離線處理的方式調整架構內可設定之參數，並觀察各參數對於整體架構之動態變化。得到各參數之設定關係後，並將此開發系統架構移植至FPGA晶片並進行性能、即時性驗證，並與各廠牌之磁性量測系統規格比較。

This research focuses on the development of real-time signal correction method applied on quadrature-signal systems such as magnetic and optical encoders. Without correction, the measured signals are not perfect sinusoidal, due to existing DC offsets, amplitude deviation, phase-shifts and waveform distortions, leading to inaccurate interpolation for position. In order to eliminate those noise, one needs to calibrate and filter out the signals. Through Fast Fourier Transform (FFT), the spectrum of the signals can be obtained. With the selection of the specific filter and the proposed method, the accuracy of positioning can be improved is proposed in this research.
To achieve the highest accuracy, this research proposes an approach of using notch filter based on lattice structure. The proposed notch filter is robust to the changing of parameters when compared with other digital filter implementation structures. Secondly, signal correction based on phase-lock-loop is investigated in this research to extract phases of a pair of input signals and to regenerate the corresponding signals, which can alleviate uncertainty in analyzing position. Finally, good noise rejection capability is validated through calibrated experiments, which suggests the effectiveness of the proposed method of this research.

摘要----------------------------------I
Abstract-----------------------------II
目錄--------------------------------III
圖目錄--------------------------------V
表目錄-------------------------------IX
第一章 緒論--------------------------1
1.1 前言--------------------------1
1.2 技術背景及產品現況-------------4
1.2.1 磁性編碼器現況-----------------4
1.2.2 讀頭感測原理-------------------6
1.2.3 細分割(interpolation)原理------8
1.3 文獻回顧-----------------------9
1.3.1 訊號修正之方法-----------------9
第二章 理論背景----------------------17
2.1 數位濾波器--------------------17
2.1.1 有限脈衝響應濾波器(FIR Filter)-18
2.1.2 無限脈衝響應濾波器(IIR filter)-20
2.1.3 濾波器規格--------------------31
2.2 鎖相迴路原理------------------34
2.3 自適應濾波器類型--------------36
2.3.1 最小均方濾波器----------------36
2.3.2 自適應格型濾波器--------------37
第三章 量測訊號頻譜分析--------------43
3.1 實驗器材----------------------43
3.2 實驗流程----------------------44
3.3 實驗內容----------------------45
3.3.1 量測訊號頻域分析---------------45
3.3.2 數位濾波器設計與實現-----------50
3.3.3 濾波前後訊號頻譜比較-----------58
3.4 實驗結果及討論-----------------61
第四章 鎖相迴路架構分析---------------62
4.1 實驗流程-----------------------62
4.2 實驗內容-----------------------63
4.2.1 迴路濾波器---------------------63
4.2.2 壓控震盪器---------------------65
4.3 實驗結果與討論------------------70
第五章 定位系統性能驗證----------------71
5.1 離線補償架構建立----------------71
5.1.1 實驗架設------------------------71
5.1.2 實驗流程及參數設定---------------72
5.1.3 各掃描速度下量測訊號修正之驗證----73
5.1.4 訊號修正方法的相位誤差比較-------75
5.2 在線補償建立與性能驗證-----------82
5.2.1 實驗設備------------------------82
5.2.2 數位電路模擬及驗證---------------85
5.2.3 重現精度測試---------------------87
第六章 總結與未來工作-------------------90
6.1 總結-----------------------------90
6.2 本文貢獻-------------------------90
6.2.1 確認影響定位精度的雜訊及組成------90
6.2.2 實現訊號處理架於FPGA晶片----------91
6.2.3 以PLL濾波使定位系統的重複精度達成工程規格-91
6.3 未來展望-------------------------92
6.3.1 訊號校正機制建立------------------92
6.3.2 訂定移動平台速度、加速度規格-------92
6.3.3 位置解析方法於DSP晶片實現----------92
參考文獻----------------------------------94

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