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作者(中文):蘇竹君
作者(外文):SU, CHU-CHUN
論文名稱(中文):堆疊式穿隧氧化層以改善多晶鍺通道電荷捕捉式快閃記憶體元件之可靠度研究
論文名稱(外文):Improved Reliability of Poly-Ge Charge-Trapping Flash Memory Devices With Stacked Tunneling Layer
指導教授(中文):張廖貴術
指導教授(外文):ChangLiao, Kuei-Shu
口試委員(中文):沈昌宏
黃文賢
口試委員(外文):Shen, Chang-Hong
Huang, Wen-Xian
學位類別:碩士
校院名稱:國立清華大學
系所名稱:工程與系統科學系
學號:106011538
出版年(民國):108
畢業學年度:108
語文別:中文
論文頁數:113
中文關鍵詞:穿隧氧化層多晶鍺電荷捕捉式快閃記憶體
外文關鍵詞:Tunneling LayerPoly-GeCharge-Trapping Flash Memory Devices
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為了提升快閃記憶體的各項特性,諸多方法被提出並且研究,例如:高介電係數材料的引用、多向閘極的應用、無接面元件…等等,但多晶鍺快閃記憶體的研究是較少見的。因為鍺的能帶較小能有相較於矽更多的載子注入,可以提升快閃記憶體的操作速度,另外鍺元件的製程溫度較低,也有助於3D的製程條件。鍺對於佈值離子的溶解度不高,加上鍺材料在未進行摻雜前因本身材料缺陷呈現偏P型半導體材料,N型通道多晶鍺快閃記憶體的離子佈值劑量需要優化。在高溫製程中因為鍺向外擴散到穿隧氧化層以至於有缺陷產生,進而導致多晶鍺快閃記憶體的可靠度劣化。本論文的主要目標是,藉由優化通道摻雜與穿隧氧化層以提升N型多晶鍺無接面電荷捕捉式快閃記憶體元件的各項特性。
本論文分成三個部分。第一部分是調變離子佈值參數,使多晶鍺完全反轉成N型半導體材料。由實驗結果發現,隨著離子佈值能量越大佈值劑量越濃,越能使通道區域中的多晶鍺的載子越多,有利於寫入速度與可靠度方面的提升。但也因為通道中的電子越濃,在抹除速度上大幅的降低。
第二部分是改善多晶鍺無接面電荷捕捉式快閃記憶體元件的可靠度。使用氮氧化鋁(AlON)取代氧化鋁(Al2O3)作為穿隧氧化層以提升元件耐久力,因為氮氧化鋁(AlON)有經過氨電漿處理後能修補氧化鋁(Al2O3)中的電洞缺陷。另外,在穿隧氧化層中加入一層以感應耦合電漿化學氣相沉積系統沉積氧化矽(SiO2),利用氧化矽(SiO2)以提升元件的電荷保持力,並且利用氧化矽(SiO2)是較低介電係數材料,能產生較大的穿隧電場以提升操作速度。而在電荷捕捉層則是以感應耦合電漿化學氣相沉積系統(ICPCVD)沉積氮化矽(Si3N4)取代氮氧化鋁(AlON)作為電荷捕捉層以提升電荷保持力。
第三部分是利用對氧化鍺進行氨電漿處理增強氧化鍺的熱穩定性,並且提升元件的可靠度。實驗中發現在穿隧氧化層中進行氨處理皆有助於提升元件的耐久力,其中以分別氧化鋁(Al2O3)與氧化鍺(GeO2)都作氨電漿處理的元件在電荷保持力與元件耐久力上都有最好的表現,並且在操作速度上不作太大的犧牲。
Although high-K dielectric, multi-gate and junctionless structure were reported to improve operation characteristics of flash memory devices, the study of poly Ge channel is rarely seen. The operation speeds of flash memory devices can be improved with Ge channel due to more injection carrier by small energy bandgap. The lower process thermal budget is also helpful for 3D integration. Since Ge is an intrinsic p-type semiconductor material with many defects, it is difficultly doped into n-type by ion implantation. Hence, the study of optimized energy of and dose of ion implantation for n-type poly Ge channel is crucial for flash memory devices. The reliability of poly Ge flash devices may be degraded after thermal process, because the defects in the tunneling are increased by Ge out diffusion. The main targets in thesis are to study channel doping and tunneling oxide for improving the characteristics of n-type poly-Ge junctionless charge trapping flash memory devices.
The thesis includes three parts. In the first part, the poly Ge film was doped into N-type by various energy and dose of ion implantations. It is found that more electron concentrations in the channel are obtained by higher energy and dose of ion implantation. Charge Trapping flash devices with more carrier concentration can achieve not only the higher programming speed but also better reliability. However, the erasing speed is slower because of less hole concentration in channel.
In the second part, the reliability of poly Ge junctionless charge trapping flash memory device was studied. The endurance can be improved by replacing Al2O3 with AlON in the tunneling layer. The improvement can be attributed to the better stability of AlON as compared to that of Al2O3 such that GeOx out diffusion can be reduced. It is found that retention can be improved by inserting SiO2 formed with ICPCVD in the tunneling layer, which is also helpful to improve operation speed because of a stronger electrical field in the tunneling layer. Another method for improving retention is to replace AlON by a Si3N4 formed with ICPCVD in the trapping layer.
In the third part, the thermal stability of GeO2 film and reliability of devices are enhanced by NH3 plasma treatment. It can be found that devices with NH3 plasma treated GeO2 and AlON in the tunneling layer have the best reliability without scarifying operation speed.
摘要 i
ABSTRACT ii
致謝 iv
目錄 v
圖目錄 viii
表目錄 xiii
第1章 序論 1
1.1. 快閃記憶體元件 1
1.1.1 浮動閘極式快閃記憶體 2
1.1.2 電荷捕捉式快閃記憶體 3
1.2. 多晶矽與多晶鍺薄膜電晶體 4
1.3. 鍺材料特性與雷射退火 5
1.4. 環繞式閘極結構與奈米線通道式快閃記憶體 6
1.5. 高介電係數材料與能帶工程 7
1.5.1 高介電係數材料 7
1.5.2 能帶工程 8
1.6. 無接面快閃記憶體元件 10
1.7. 各章摘要 12
第2章 快閃記憶體元件製作與操作方式 25
2.1. 快閃記憶體元件製造 25
2.1.1 原子氣相沉積系統 25
2.1.2 感應耦合型電漿化學氣相沉積系統 26
2.1.3 三閘極無接面快閃記憶體元件製作 27
2.1.4 環繞式閘極無接面快閃記憶體元件製作 29
2.2. 無接面電荷捕捉式快閃記憶體寫入與抹除 31
2.3. 載子穿隧機制 31
2.3.1 Fowler-Nordheim Tunneling寫入與抹除 32
2.3.2 直接穿隧(Direct Tunneling) 33
2.4. 電荷捕捉式快閃記憶體元件可靠度分析 33
2.4.1 元件耐久力 33
2.4.2 電荷保持力 34
第3章 以最佳離子佈值條件優化N型多晶鍺無接面電荷捕捉式快閃記憶體元件之特性 44
3.1. 研究動機與背景 44
3.2. 實驗流程 45
3.3. 結果與討論 47
3.3.1 元件之汲極電流對閘極電壓特性圖 47
3.3.2 元件寫入與抹除特性 48
3.3.3 元件可靠度特性 49
3.4. 結論 50
第4章 以堆疊穿隧氧化層優化多晶鍺無接面電荷捕捉式快閃記憶體之可靠度 63
4.1. 研究動機與背景 63
4.2. 實驗流程 64
4.3. 結果與討論 66
4.3.1 元件之汲極電流對閘極電壓特性圖 66
4.3.2 元件寫入與抹除特性 66
4.3.3 元件可靠度特性 69
4.4. 結論 70
第5章 對GeO2進行氨電漿處理以提升多晶鍺無接面電荷捕捉式快閃記憶體的可靠度特性 87
5.1. 研究動機與背景 88
5.2. 實驗流程 89
5.3. 結果與討論 90
5.3.1 元件之汲極電流對閘極電壓特性作圖 90
5.3.2 元件的寫入與抹除特性 91
5.3.3 元件可靠度特性 93
5.4. 結論 94
第6章 總結 106
6.1. 結論 106
6.2. 未來展望 107
參考文獻 109
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