隨著元件尺寸不斷微縮，短通道效應愈益明顯，鰭式場效電晶體的發明，克服了很多短通道效應產生的問題，使摩爾定律能夠延續下去。然而，此種三維結構電晶體所產生的寄生效應更加明顯，尤其當工藝節點演進至10奈米時，寄生元件成了影響整體元件效能的主要關鍵。
在本論文中，建立四種不同的鰭式場效電晶體模型，尺寸分別為16、10、7及5奈米，分別萃取和分析其寄生電容、寄生電阻以及電阻電容時間常數。寄生電容所佔比例由30.8%上升至40.7%，其中以閘極至間隔層下方鰭的電容為主要的寄生電容，其比例由19.8%上升至25.5%。寄生電阻所佔比例由34.7%上升至59.5%，其中以源汲極的接觸電阻為主要因素，其比例由10.7%上升至33.1%。技術節點由16奈米微縮至10奈米時，電阻電容時間常數些微上升，而節點到了7奈米及5奈米時，電阻電容時間常數呈現明顯上升趨勢，代表寄生元件的影響非常嚴重。本論文透過改變鰭的高度、寬度以及磊晶結構，了解這些參數和寄生電容與寄生電阻的關係，進而找到一個最佳解使電阻電容時間常數變小，提升電晶體的效能。

Since dimensions of device channel shrink, several Short Channel Effects (SCEs) appear. The FinFET which provides excellent gate control over short channel effects is considered one of the major solutions. However, the three-dimension device provides a lot of parasitic components which reduce the performance. The parasitic components of FinFET become one of the key limiting factors in achieving the target device performance beyond the 10 nm technology node.
The object of this thesis is to establish the effects of FinFET model on its parasitic capacitances, parasitic resistances, and RC time constant with 3D device simulations. The gate to spacer capacitance is the most dominant parasitic capacitance. It ramps up from a negligible weight of 19.8% to 25.5%. The Source/Drain contact resistance is the most dominant resistance. It ramps up from a negligible weight of 10.7% to 33.1%. Moreover, the RC time constant is an upward trend beyond the 10nm technology node. At last, by adjusting the fin height and the fin width, the parasitic capacitances and resistances with respect to fin geometry of FinFET are analyzed. In order to improve the performance of the device, the device geometry has to be optimized.

致謝
摘要
Abstract
內文目錄
圖目錄
表目錄
第1章 ：緒論............................1
1.1 研究背景...........................1
1.2 研究動機...........................4
1.3 論文架構...........................5
第2章 ：文獻回顧........................6
2.1 電晶體簡介..........................6
2.1.1 金屬氧化物半導體場效電晶體........7
2.1.2 鰭式場效電晶體...................12
2.2 寄生元件............................16
2.2.1 寄生電容.........................17
2.2.2 寄生電阻.........................19
2.3 反相器與環形振盪器的延遲時間..........21
第3章 ：FinFET之基本電性模擬...............25
3.1 模擬軟體介紹..........................25
3.2 鰭式場效電晶體基本模型與電性...........28
3.2.1 基本模型..........................28
3.2.2 基本電性分析.......................30
第4章 ：FinFET之寄生元件模擬................36
4.1 模擬模型與方法介紹.....................36
4.1.1 寄生電容分析........................36
4.1.2 寄生電阻分析........................39
4.2 模擬結果分析...........................42
4.2.1 寄生電容............................42
4.2.2 寄生電阻............................46
4.3 電阻電容延遲時間.........................50
4.3.1 時間常數定義..........................50
4.3.2 模擬數據分析...........................52
4.4 寄生元件對不同參數之模擬與改善.............55
4.4.1 鰭高之模擬與分析.......................55
4.4.2 鰭寬之模擬與分析.......................61
4.4.3 磊晶結構之模擬與分析....................66
第5章 ：總結與未來展望.........................68
5.1 結論......................................68
5.2 未來展望..................................69
參考文獻......................................70

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