早期毫米波波段的電路大部分都是使用Ⅲ-Ⅴ族元素的元件進行設計，但是Ⅲ-Ⅴ族元件的成本相較於CMOS元件要來的高，且整合難度也較高，因此高頻段的電路普及化就相當不易。如今隨著CMOS的製程演進，已經擺脫早期電晶體的截止頻率過低的問題，增加了使用CMOS元件來實現兆赫波電路的可行性。
本論文主要探討在不同的奈米等級下實現94 GHz 和 0.34 THz 的鎖相迴路晶片，這些電路都將以CMOS的製程技術實現，以達到降低成本、高度整合且具功能運作的電路。
首先為操作在V band 的注入式鎖定壓控震盪器，其中抱括一個20 GHz 和60 GHz 的壓控震盪器，並使用20 GHz的訊號去鎖定60 GHz的訊號，目的是使60 GHz的相位雜訊去追蹤20 GHz 的相位雜訊，以達到較低的相位雜訊。
在W band 的鎖相迴路中採用tsmc 90nm CMOS 的製程，其中的電路包括二倍頻輸出的壓控震盪器、除頻器、相位-頻率偵測器、充電泵和低通濾波器。震盪器的部分使用在電晶體閘極端增加相位延遲的技術來增加輸出功率，在震盪器單獨量測的結果，輸出功率在94 GHz可以達到-17.8 dBm；注入式鎖定除頻器則是使用雙重路徑的注入技術去增加鎖定頻率的範圍。
最後0.34兆赫波的鎖相迴路中則使用 tsmc 40nm CMOS的製程去實現，其中的電路將W band 的二倍頻壓控震盪器改成三倍頻考畢茲震盪器，考畢茲震盪器架構的相位雜訊較一般震盪器架構要來的低，原因是因為考畢茲震盪器的脈衝靈敏度函數較一般的震盪器來的對稱，因此元件雜訊較難轉換成相位雜訊；注入式鎖定除頻器也從原本除以二的電路改為除以三的電路，如此可以減少除頻器的數目，以此減少鎖相迴路整體的功率消耗，另外採用增加次諧頻功率的技術，來達到最大的鎖定範圍。

In early times, most millimeter-wave circuits are designed by Ⅲ-Ⅴ semi-conductor technologies, but the cost of Ⅲ-Ⅴ semi-conductors is expensive and Ⅲ-Ⅴ semi-conductors is hard to integrate, which lead the limited popularity of millimeter-wave circuits. With the improvement of the CMOS technology, the problem of the low cut-off frequency has been solved, and the feasibility of using CMOS components to implement terahertz circuits has increased.
This thesis focuses on implementing 94 GHz and 0.34 THz phase-locked loop at different nanoscales and these circuits will be realized in CMOS process technology to achieve cost-reduced, highly integrated and functional work circuits.
The W-band high output power phase-locked loop in 90-nm CMOS is presented, which composed of the push-push voltage controlled oscillator, frequency dividers, phase-frequency detector, charge pump and low pass filter. To enhance the 94 GHz output power, the phase delay is added in front of the transistor gate. The output power can achieve -17.8 dBm at 94 GHz. A dual path injection technology is proposed for the injection-locked frequency divider to achieve wide locking range.
The 0.34 THz phase-locked loop is implemented in the TSMC 40nm CMOS process, in which the circuit changes the W band push-push oscillator to the triple-push Colpitts oscillator. The phase noise of the Colpitts oscillator is lower than a conventional oscillator; due to the impulse sensitivity function of the Colpitts oscillator is relatively symmetrical. The divide-by-two injection-locked frequency divider is also changed to divide-by three. As such, the overall power consumption of the phase-locked loop can be reduced. Furthermore, the technique of increasing the power of the second harmonic is proposed to achieve the maximum locking range.

摘要 i
ABSTRACT ii
致謝 iii
Contents iv
List of Figures vi
List of Tables x
Chapter 1 Introduction 1
1.1. Background and Motivation 1
1.2. Thesis Organization 2
Chapter 2 Phase-Locked Loop Fundamentals 3
2.1. System Models of Phase-Locked Loops 3
2.1.1 Type-I PLLs 3
2.1.2 Type-II PLLs 5
2.1.2.1 2nd Order PLL with 1st Oder Loop Filter 6
2.1.2.2 3rd Order PLL with 2nd Oder Loop Filter 9
2.1.2.3 4th Order PLL with 3rd Oder Loop Filter 11
2.2. Key components of the phase locked loop 12
2.2.1 Design of the voltage-controlled oscillators 12
2.2.2 Design of the injection-locked frequency dividers 19
Chapter 3 A V Band Injection-Locked Voltage-Controlled Oscillator in 90-nm CMOS 23
3.1. Overall Circuit Architecture 23
3.2. Circuit Design 24
3.3. Simulation and Measurement Results 29
3.4. Conclusions 35
Chapter 4 A W Band High Output Power Phase-Locked Loop in 90-nm CMOS 37
4.1. Overall Circuit Architecture 37
4.2. Key components of the W Band PLL 39
4.2.1 A High Output Power Push-Push Oscillator 39
4.2.2 A Wide-Locking Range Injection-Locked Frequency Divider by Dual-Port Injections 47
4.3. PCB Design 50
4.4. Simulation and Measurement Results 52
4.5. Conclusions 59
Chapter 5 A 0.34 THz Signal Source Generator in 40-nm CMOS 61
5.1. Overall Circuit Architecture 61
5.2. Key components of the 0.34 THz Signal Source 62
5.2.1 A Triple-Push Drain Combined Colpitts Oscillator 62
5.2.2 A Wide-Locking-Range Subharmonic Enhanced Injection-Locked Frequency Divider 69
5.3. Simulation and Measurement Results 74
5.4. Conclusions 81
Chapter 6 Conclusions and Future Works 82
Reference 84

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