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作者(中文):謝瑋庭
作者(外文):Hsieh, Wei-Ting.
論文名稱(中文):應用於邏輯製程之新型差動式 接觸點電阻式記憶體研究
論文名稱(外文):A Study of Differential Contact RRAM Cell for Advanced Logic NVM applications
指導教授(中文):金雅琴
指導教授(外文):King, Ya-Chin.
口試委員(中文):林崇榮
施教仁
口試委員(外文):Lin, Chrong-Jung.
Shih, Jiaw-Ren.
學位類別:碩士
校院名稱:國立清華大學
系所名稱:電子工程研究所
學號:105063547
出版年(民國):107
畢業學年度:106
語文別:中文
論文頁數:66
中文關鍵詞:差動式結構電阻式記憶體接觸點電阻式記憶體非揮發性記憶體
外文關鍵詞:Differential StructureResistive Random Access MemoryContact Resistive Random Access MemoryNonvolatile Memory
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近年來,隨著可攜式電子產品的發展:如智慧型手機、穿戴式裝置、平板電腦,物聯網 (Internet of Things, IOT)成為熱門的開發題目之一。現今非揮發性記憶體中,占有主流地位的快閃記憶體遭受資料流失、極高操作電壓以及製程微縮的挑戰,促使新型記憶體如電阻式隨機存取記憶體(Resistive Random Access Memory)和磁阻式隨機存取記憶體(Magnetic Random Access Memory)研究的蓬勃發展。
傳統的一個電晶體與一個RRAM單元串聯的 (1T1R) 接觸點電阻式隨機存取記憶體(Contact Resistive Random Access Memory, CRRAM)架構限制電阻轉換層面積大小,具有高密度應用的潛力,但是伴隨著電阻轉換層變異性很大,也造就1T1R CRRAM陣列面臨許多資料保存性的問題。本論文以28奈米高介電質金屬閘極互補金氧半邏輯製程實現差動式接觸點電阻式隨機存取記憶體(Differential CRRAM),此記憶體由兩個相同的1T1R CRRAM串聯而成,並藉由淺溝槽絕緣層當作隔絕,藉由差動式結構克服元件變異,提升元件穩定度。此記憶體在直流掃描與交流脈衝操作中具有低功率消耗且高速操作特性,利用逐步脈衝寫入演算法可使記憶體有高耐久度,儲存資料在高溫連續烘烤下可穩定保存資料,高低阻態的資料並不會失真,相較於傳統1T1R CRRAM,此記憶體讀取視窗有效增加。新型的差動式接觸點電阻式隨機存取記憶體具有良好的操作特性及良好的資料保存能力,並成功解決傳統1T1R CRRAM穩定度以及耐久度的問題,非常適合低密度邏輯相容性非揮發性記憶體的應用。 
In recent year, Internet of Things (IoT) becomes one of the most popular topics with the development of wearable devices including smart phones and tablets. As CMOS technology scales, the mainstream nonvolatile memory, flash memory technology subjects to drastic data retention and interference problems. Therefore, emerging memory such as Resistive Random Access Memory (RRAM) and Magnetic Random Access Memory (MRAM) has been developed for embedded non-volatile memory applications.
1T1R CRRAM structure confines the RRAM within ultra-small contact hole, which is suitable for high density applications. However, stability has been one of the critical challenges in the implementation of large resistive random access memory (RRAM) arrays. Read window degradation in cell repeatedly cycled can significantly limit the design margins and applications of such memory technologies. In this dissertation, the new differential CRRAM cell composed of two CRRAM storage nodes in pair is implemented by a standard 28nm high-k metal gate CMOS logic process. The differential pair is formed by placing two identical contact RRAM storage node isolated by a shallow trench isolation (STI). During DC and AC operation, this memory features low power consumption and high program speed. To ensure the stable sensing current window during cycling, incremental step pulse programming (ISPP) method is applied. Retention characteristics under high temperature bake for 1000k seconds reveal that differential cells exhibit superior data integrity. Read current stability is tested under continuous read stress. Differential CRRAM pair solves the reliability problems of traditional 1T1R cells. In addition, differential CRRAM pair has superior reliability and endurance under ISPP and bake tests. Furthermore, differential CRRAM pair increases read window and simplicity of its symmetric structure, and it is suitable for low-density logic NVM applications.
內文目錄
摘要----------------------------i
Abstract------------------------ii
致謝-----------------------------iv
內文目錄--------------------------v
附圖目錄--------------------------vii
附表目錄--------------------------ix
第一章 序論-----------------------------1
1.1邏輯相容性非揮發性記憶體-----------------------------1
1.1.1 磁阻式記憶體----------------------------- 2
1.1.2 相變化記憶體----------------------------- 2
1.1.3 電阻式記憶體----------------------------- 3
1.2 論文大綱---------------------------------- 3
第二章 電阻式記憶體回顧---------------------------12
2.1電阻式記憶體阻值切換模型-----------------------12
2.2初始化操作----------------------------------- 14
2.3阻值切換操作與極性特性-------------------------14
2.4電阻式記憶體陣列技術---------------------------15
2.5電阻式記憶體的挑戰---------------------------- 17
2.6小結-----------------------------------------17
第三章 新型差動式接觸點電阻式記憶體研究-----------29
3.1 差動式接觸點電阻式記憶體製程流程與元件結構----- 29
3.2 差動式接觸點電阻式記憶體陣列結構---------------30
3.3 差動式接觸點電阻式記憶體操作流程---------------30
3.4 小結----------------------------------------31
第四章 新型差動式接觸點電阻式記憶體量測分析--------39
4.1 量測環境介紹----------------------------------39
4.2 差動式接觸點電阻式記憶體元件特性探討------------39
4.3 逐步增加脈衝應用於元件操作----------------------40
4.4 可靠度量測與分析-------------------------------41
4.4.1 讀取干擾測試---------------------------------41
4.4.2 資料保存性分析--------------------------------41
4.4.3 過度寫入與陣列干擾測試------------------------42
4.5 1T1R與Differential CRRAM之特性比較-------------42
4.6 小結------------------------------------------43
第五章 總結---------------------------------------60
參考文獻 61

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