在未來，物聯網(Internet Of Things,IOT)將實現世界數位化，所有物品將配合網路改變人類的生活方式。隨著消費攜帶型電子產品蓬勃發展，內嵌式記憶體的需求逐年升高，其中將非揮發記憶體與中央處理器整合的技術PIM(Process In Memory,PIM)在提升電子產品效能上扮演著關鍵角色，該技術除了可以大幅提升處理器(CPU)的處理速度外，還可以減少電力消耗，使電子產品的運算效率提高。目前市面上的非揮發性記憶體皆屬於電荷儲存式的快閃記憶體，但隨著半導體製程的微縮，浮動閘極中所儲存的電荷會越來越少，代表儲存1跟0的的狀態會越來越接近，最後可能導致其無法正常操作，因此許多研究團隊紛紛開始積極投入具有高密度、高可靠度的優勢並且能夠高度寫入/讀取的新世代記憶體研究。
本論文提出一以16奈米鰭式電晶體邏輯製程之後段銅金屬製程實現的蝕刻孔電阻式記憶體(Via Resistive Random Access Memory,Via-RRAM)，此記憶體在製程無須額外光罩，且記憶單元佈局面積極小，因此可達到高密度和具有直接與運算單元整合之優點，且由於是在後端金屬線製程製作，該元件具有很好的可微縮性。在此篇論文中將透過直流掃描(DC Sweep)與交流脈衝(AC Pulse)證明其具有低功耗和高速操作特性，並且利用ISPP演算法提高該元件之耐久度，另外，此元件也透過高溫連續烘烤、長時間讀取測試、過度設定/重設測試證明其具有良好的資料保存能力。

With the fast development of internet applications and handheld electronic products, demands of various memory modules in ultra-large scale integration (ULSI) circuits increase every year. For non-volatile data storage applications, emerging memories such as phase change random access memory (PCRAM), magetoresistive random access memory (MRAM) and resistive random access memory (RRAM) were investigated. These next-generation nonvolatile memories (NVM) have the advantages of high storage density, excellent reliability and high write/read speed. In this research, a new high-density via RRAM which is fully compatible with copper-based complimentary metal-oxide-silicon (CMOS) logic back-end-of-line (BEOL) process has be proposed. These NVM cells can be easily implemented through special design in the single mask layer layout. This device exhibits excellent electrical characteristics and has the feature to achieve ultra-high storage density array in a repeatable pattern in standard BEOL layers. In addition, this research has demonstrated that Via RRAM cell features low voltage operation, large read window, good data retention and cycling capability. As fine alignments between mask layers become possible, the twin-bit Via RRAM cell is expected to be highly scalable in advanced FinFET technology.

摘要 i
Abstract ii
內文目錄 iii
附圖目錄 v
附表目錄 vii
第一章 序論 1
1.1新型記憶體介紹 1
1.1.1磁阻式隨機存取記憶體(MRAM) 2
1.1.2相變化記憶體(PCRAM) 2
1.1.3電阻式隨機存取記憶體(RRAM) 2
1.2論文大綱 3
第二章 相關技術回顧與發展 6
2.1 RRAM基本操作特性 6
2.1.1 初始化(Forming) 6
2.1.2 電阻轉換特性 7
2.1.3 RRAM物理模型 8
(i) 氧空缺粒子跳躍模型(oxygen vacancy hopping model) 8
(ii) 自我加速熱溶解模型(self-accelerated thermal dissolution model) 9
2.2 邏輯RRAM技術回顧 10
2.2.1 2T HKMG RRAM 10
2.2.2 Contact RRAM 11
2.2.3 邏輯電阻式記憶體在製程微縮上的挑戰 11
2.3 研究動機與目的 12
第三章 FinFET製程下之蝕刻孔電阻式記憶體設計概念 27
3.1雙鑲嵌銅金屬線製程 27
(a) 金屬溝槽優先(Trench First) 28
(b) 蝕刻孔優先(Via first) 28
(c) 自我校準(Self-Aligned) 28
3.2 蝕刻孔電阻式記憶體元件架構 29
3.3驅動元件和記憶體陣列 30
3.4小結 30
第四章 蝕刻孔電阻式記憶體量測分析與討論 40
4.1量測環境介紹 40
4.2電阻式薄膜厚度與元件變異探討 41
4.3元件特性與最佳化 41
4.4逐步增加脈衝應用於元件操作 42
4.5可靠度分析 43
4.6小節 44
第五章 總結 59

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