繞線在現代的超大型積體電路設計中有著很重要的角色，傳統上由兩個階段組成，分別為全域繞線與細部繞線，為了降低細部繞線問題的複雜性，我們有時候會採用軌道配置的方法，由於近年來細部繞線的問題變得更加複雜，我們可以進一步將其分為兩個步驟，分別為初步細部繞線與細部繞線修正。在本篇論文中，我們對一個基於軌道配置初步細部繞線的方法提出了一種基於拔起並重繞的修正技術，還使用一種補丁附加的方法來減少設計規則的違反，實驗結果顯示，我們的修正技術可以改善基於軌道配置初步細部繞線的結果品質，此外，與ISPD 2018年初步細部繞線比賽的前兩名團隊結果相比，我們平均上獲得了最佳排名。

Routing plays an important role in modern VLSI design. It traditionally consists of two stages: global routing and detailed routing. To reduce the complexity of detailed routing, a track assignment procedure is sometimes adopted. Since detailed routing becomes much more complicated in recent years, we can further divide it into two steps: initial detailed routing and detailed routing refinement. In this thesis, we propose a rip-up-and-reroute-based refinement method following a track-assignment-based initial detailed routing algorithm. A patch attachment method is also performed to reduce design rule violations. The experimental results show that our refinement methods can improve the solution quality for a track-assignment-based initial detailed routing result. Moreover, compared with the top 2 teams of the ISPD 2018 Initial Detailed Routing Contest, we obtain the best average ranking.

1 Introduction 1
2 Preliminaries and Problem Formulation 4
2.1 Connectivity Constraints . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.1.1 Open . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.1.2 Short . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.2 DRC Constraints . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.2.1 Min-area Rule . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2.2.2 Spacing Table . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2.2.3 End-of-line Spacing Rule . . . . . . . . . . . . . . . . . . . . . . 5
2.2.4 Cut Spacing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2.3 Routing Preference Metrics . . . . . . . . . . . . . . . . . . . . . . . . . 6
2.3.1 Routing Guide Honoring . . . . . . . . . . . . . . . . . . . . . . 6
2.3.2 Wrong-Way Routing Minimization . . . . . . . . . . . . . . . . 6
2.3.3 Off-track Routing Minimization . . . . . . . . . . . . . . . . . . 7
2.4 Problem Formulation . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
3 Overview of Our Initial Detailed Routing Flow 9
3.1 Track-Assignment-Based Congestion Analysis . . . . . . . . . . . . . . 9
3.2 Routing Pattern Connection . . . . . . . . . . . . . . . . . . . . . . . . . 10
4 Routing Refinement 12
4.1 Ripup-and-Reroute-Based Refinement . . . . . . . . . . . . . . . . . . . 12
4.2 Patch Attachment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
4.2.1 Patch for Min-Area Violation Reduction . . . . . . . . . . . . . . 15
4.2.2 Patch for Spacing Violation Reduction . . . . . . . . . . . . . . . 17
4.2.3 Remarks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
5 Experimental Results 19
6 Conclusion 23

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