2.5D集成電路是IC發展的一種新趨勢。 2.5D集成電路在成本的節約上有著許多優勢，這引起了半導體產業對這項技術的龐大興趣。 另一方面，2.5D IC技術已顯示出可以抵禦來自不受信任/惡意的代工廠的智慧財產權（IP）剽竊的能力。
透過混淆2.5D IC中晶片彼此之間的相關性，我們可以承受逆向工程攻擊，並將我們的商業機密保留在中介層中。

在本論文中，我們提出了一種基於超圖雙向分配並考量安全性之2.5D IC切割演算法。我們可以將原始設計簡化為超圖，將邏輯閘描述為超節點，其中內部的導線描述為超邊，再以我們的演算法來定制分割並確定特定導線的來源與接收被分配於兩個不同的分區以確保對特定相關性進行混淆，同時最小化再分配層中的導線數量。
此項目基於n-level超圖分區框架KaHyPar，我們修改了其中的初始分區階段和本地搜索階段以實現我們的要求。

2.5D integration is an IC development trend. There are good economic reasons for the huge interest in 2.5D ICs by the semiconductor industry. On the other hand, 2.5D IC technology has shown the capability to counter Intellectual Property (IP) piracy from untrusted foundries. By obfuscating the correlations between chips in 2.5D ICs, we can withstand reverse-engineering attack and keep our secret in redistribution layers.

In this thesis, we propose a security-aware bipartitoning algorithm for 2.5D IC which is based on hypergraph bipartion.
We could simplify the original design into a hypergraph. The logic gates in the design are depicted as hypernodes, and the wires are depicted as hyperedges. Then we can apply our algorithm to customize the partition and make sure the particular correlations be obfuscated by splitting the source and sinks of the particular edge into two parts, also minimized the number of wires in redistribution layers.
This project is based on the n-Level hypergraph partitioning framework KaHyPar, and we modify the initial partitioning phase and local search phase to achieve our requirements.

1 Introduction 1
1.1 IC Security of 2.5D Integrated Circuits(ICs) 1
1.2 Hypergraph Bipartitioning 2
1.3 Related Works 3
2 Problem Formulation 5
3 Algorithm 9
3.1 Overview 9
3.2 Initial Partitioning 13
3.3 Local Search 23
4 Experimental Results 29
5 Conclusion 43
References 45

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