隨著積體電路關鍵尺寸快速的微縮，鍺因為有著較高的電子與電洞遷移率，以及和矽製程有較高的相容性，而被視為有機會取代矽做為半導體通道材料，但鍺在應用上，還是有些問題需要克服，特別是在n型鍺與金屬接觸會有較大的蕭特基能障，導致較大的接觸阻抗，因為在價帶附近有很強的費米能階釘扎現象，使得蕭特基能障不受接觸金屬功函數調變，而造成費米能階釘扎的原因，主要為金屬誘發間隙狀態和半導體介面能態。本論文探討使用氧電漿處理形成介面氧化層，以M-I-S結構來緩解費米能階釘扎而有較低接觸電阻，論文依照摻雜濃度分為兩部分。
第一部份為未摻雜的鍺基板，在鍺基板上使用氧電漿處理會在表面形成氧化鍺，藉由改變氧電漿處理時間可形成不同厚度的氧化鍺，金屬與鍺半導體直接接觸為整流特性，經過一定時間氧電漿處理形成氧化鍺後鍍上鈦金屬，會於之間形成Ti-Ge-O氧化層而變為歐姆特性，氧電漿處理300秒後逆偏電流密度最高，是因為這層氧化層能夠有效降低MIGS效應，且不會造成過多的串阻，鍺基板經氧電漿處理300秒與金屬鈦所形成介面氧化層厚度為1.74nm。在經氧電漿處理所形成的氧化鍺上沉積不同的金屬會影響所形成的介面氧化層， XPS分析發現，沉積較厚的金屬鈦，Ge–O鍵的強度降低，而Ti-O鍵的強度增加，Al/TiN/Ti(50nm)/IL/n-Ge得到的電流密度提升至102A/cm2，接觸電阻率為1.56 x10-4 Ω•cm2。
第二部分在高摻雜濃度鍺基板下，電流導通機制主要為穿隧效應，蕭特基位能障的寬度會變薄，接觸電阻主要受到通道電阻與串聯電阻影響，金屬結構使用第一部份沉積厚度較厚的金屬鈦會有較佳的電性，鍺基板經氧電漿處理240秒之TiN/Ti(50nm)/IL/n+Ge的接觸電阻率為1.746x10-6Ω•cm2，氧電漿處理形成的具介面氧化層Ti-Ge-O的n型鍺接觸電阻率約在10-6Ω•cm2，在高摻雜濃度時，M-I-S結構也能有效緩解費米能階釘扎並且降低接觸電阻。

With further scaling of ULSI device’s dimension, Ge is considered a potential candidate to replace silicon as the channel material, because of its high carrier mobilities and process compatibility. However, there are still some problems that need to be solved. The contact resistance between metal and n-type Ge is very high due to its high Schottky barrier height, independent of the work function of contact metal, because the Fermi level is pinned near the Ge valance band. Fermi level pinning (FLP) is caused by metal induced gate state (MIGS) and the semiconductor interface state. Therefore, the thesis was focused on the formation of M-I-S structure by oxygen plasma treatment, and a low contact resistance was achieved by alleviating FLP. The thesis is divided into two parts according to doping concentration of the Ge wafer.
In the first part, undoped germanium wafer was used to form GeOx by oxygen plasma treatment. To optimize thickness of GeOx layer, the O2 plasma treatment were applied for various time. The schottky contact became ohmic contact due to formation the Ti-Ge-O oxide interfacial layer after O2 plasma treatment and contact metal Ti deposition. Higher current density was achieved after O2 plasma treatment for 300s, because the Ti-Ge-O oxide layer could reduce MIGS effect. The thickness of Ti-Ge-O oxide layer was 1.74nm after O2 plasma treatment for 300s. Furthermore, interfacial layer effects were different for various thicknesses and stacks of contact metals. XPS analyses showed decreasing Ge-O bond and increasing Ti-O bond as thickness of contact metal Ti increased. Using Al/TiN/Ti(50nm)/IL/n-Ge structure, the higher current density 10E2A/cm2 and contact resistance 1.56E-4Ω•cm2 were obtained.
In the second part, the main conduction mechanism was tunneling for n-Ge with high doping concentration (n+Ge). Contact resistance was mainly affected by the tunneling resistance and the series resistance. The contact metal stack with thicker titanium metal, which resulted in better electrical properties in the first part, was further applied to n+Ge. Contact resistivity of 1.746E-6Ω•cm2 was achieved for n+Ge after O2 plasma treatment for 240 seconds and deposition of contact metal TiN/Ti(50nm). Contact resistivity of 1E-6Ω•cm2 was achieved for n+ Ge with Ti-Ge-O interfacial layer. The M-I-S contacts had also alleviated FLP and hence reduced contact resistance of n+Ge.

摘要 i
Abstract iii
致謝 v
目錄 vi
表目錄 ix
圖目錄 x
摘要 i
Abstract iii
致謝 v
目錄 vi
表目錄 ix
圖目錄 x
第一章 序論 1
1.1 前言 1
1.2 鍺的問題與挑戰 2
1.3 接觸電阻 2
1.3.1 摻雜濃度 3
1.3.2 蕭特基能障 4
1.4 費米能階釘扎 4
1.5 緩解費米能階釘扎的方法 5
1.5.1 金屬-絕緣層-半導體結構 5
1.5.2 表面鈍化 7
1.5.3 提高摻雜濃度 7
1.5.4 鍺化物 8
第二章 元件製程與量測 20
2.1 實驗製程與原理 20
2.1.1 晶圓清洗 20
2.1.2 氧電漿在鍺基板上形成氧化層 20
2.1.3 金屬電極形成 21
2.1.4 圖形定義 21
2.1.5 蝕刻圖形 21
2.2 電性量測 22
2.2.1 TLM接觸電阻量測 22
2.2.2 CTLM接觸電阻量測 22
2.3 物性分析 24
2.3.1 穿透式電子顯微鏡 24
2.3.2 能量色散X-射線光譜 24
2.3.3 X射線光電子能譜儀 24
第三章 氧電漿處理與金屬鈦厚度對n型鍺金屬接觸效應 28
3.1 研究動機 28
3.2 製程與條件 28
3.3 實驗結果與討論 29
3.3.1 不同氧電漿處理時間電性影響 29
3.3.2 金屬鈦厚度與氧化層電性之影響 30
3.4 結論 31
第四章 氧電漿處理在高摻雜濃度n型鍺接觸之應用 44
4.1 研究動機 44
4.2 製程與條件 44
4.3 實驗結果與討論 45
4.4 結論 46
第五章 結論與展望 57
5.1 結論 57
5.2 未來展望 58
第六章 參考文獻 59

[1] J. Bardeen and W.H. Brattain, "The transistor, a semi-conductor triode," American Physical Review, vol. 74, no. 2, p. 230, 1948.
[2] G.E. Moore,"Cramming more components onto integrated circuits," ed: McGraw-Hill New York, NY, USA, Electronics, Volume 38, Number 8, 1965.
[3] C. Claeys and E. Simoen, Germanium-based technologies: from materials to devices. Elsevier, 2011.
[4] J. Welser et al., "Strain dependence of the performance enhancement in strained-Si n-MOSFETs," in Proceedings of 1994 IEEE International Electron Devices Meeting, 1994, pp. 373-376: IEEE.
[5] M.L. Lee et al., "Strained Ge channel p-type metal–oxide–semiconductor field-effect transistors grown on Si 1− x Ge x/Si virtual substrates," Applied Physics Letters, vol. 79, no. 20, pp. 3344-3346, 2001.
[6] D.J. Paul, "Si/SiGe heterostructures: from material and physics to devices and circuits," Semiconductor science and technology, vol. 19, no. 10, p. R75, 2004.
[7] S. Brotzmann and H. Bracht, "Intrinsic and extrinsic diffusion of phosphorus, arsenic, and antimony in germanium," Journal of Applied Physics, vol. 103, no. 3, p. 033508, 2008.
[8] F.A. Trumbore, "Solid solubilities of impurity elements in germanium and silicon," Bell System Technical Journal, vol. 39, no. 1, pp. 205-233, 1960.
[9] C.O. Chui et al., "Activation and diffusion studies of ion-implanted p and n dopants in germanium," Applied physics letters, vol. 83, no. 16, pp. 3275-3277, 2003.
[10] A. Dimoulas et al., "Fermi-level pinning and charge neutrality level in germanium," Applied physics letters, vol. 89, no. 25, p. 252110, 2006.
[11] T. Nishimura et al., "Evidence for strong Fermi-level pinning due to metal-induced gap states at metal/germanium interface," Applied physics letters,vol. 91, no. 12, p. 123, 2007.
[12] S.E. Thompson and S. Parthasarathy, "Moore's law: the future of Si microelectronics," Materials today, vol. 9, no. 6, pp. 20-25, 2006.
[13] A. Ebong and N. Chen, Metallization of crystalline silicon solar cells: A review ," High Capacity Optical Networks and Emerging/Enabling Technologies, Istanbul, 2012, pp. 102-109
[14] L. An et al., "On contact resistance of carbon nanotubes," International Journal of Theoretical and Applied Nanotechnology, vol. 1, no. 2, pp. 30-40, 2013.
[15] R. Islam et al., "Schottky barrier height reduction for holes by Fermi level depinning using metal/nickel oxide/silicon contacts," Applied Physics Letters, vol. 105, no. 18, p. 182103, 2014.
[16] R.T. Tung, "Formation of an electric dipole at metal-semiconductor interfaces," Physical review B, vol. 64, no. 20, p. 205310, 2001.
[17] G. Shine and K.C. Saraswat, "Analysis of atomistic dopant variation and Fermi level depinning in nanoscale contacts," IEEE Transactions on Electron Devices, vol. 64, no. 9, pp. 3768-3774, 2017.
[18] M.-H. Liao and C. Lien, "The comprehensive study and the reduction of contact resistivity on the n-InGaAs MIS contact system with different inserted insulators," AIP Advances, vol. 5, no. 5, p. 057117, 2015.
[19] S. Dev et al., "Low resistivity contact on n-type Ge using low work-function Yb with a thin TiO2 interfacial layer," Applied Physics Letters, vol. 108, no. 10, p. 103507, 2016.
[20] Z. Yuan et al., "Schottky barrier height reduction for metal/n-GaSb contact by inserting TiO 2 interfacial layer with low tunneling resistance," Applied Physics Letters, vol. 98, no. 17, p. 172106, 2011.
[21] J.-Y.J. Lin et al., "Increase in current density for metal contacts to n-germanium by inserting TiO 2 interfacial layer to reduce Schottky barrier height," Applied Physics Letters, vol. 98, no. 9, p. 092113, 2011.
[22] J.-Y.J. Lin et al., "Reduction in Specific Contact Resistivity to n+Ge Using TiO2 Interfacial Layer," IEEE electron device letters, vol. 33, no. 11, pp. 1541-1543, 2012.
[23] T. Nishimura et al., "A significant shift of Schottky barrier heights at strongly pinned metal/germanium interface by inserting an ultra-thin insulating film," Applied physics express, vol. 1, no. 5, p. 051406, 2008.
[24] A. Agrawal et al., "A unified model for insulator selection to form ultra-low resistivity metal-insulator-semiconductor contacts to n-Si, n-Ge, and n-InGaAs," Applied Physics Letters, vol. 101, no. 4, p. 042108, 2012.
[25] J.-R. Wu et al., "Impact of fluorine treatment on Fermi level depinning for metal/germanium Schottky junctions," Applied Physics Letters, vol. 99, no. 25, p. 253504, 2011.
[26] G.-S. Kim et al., "Surface passivation of germanium using SF 6 plasma to reduce source/drain contact resistance in germanium n-FET," IEEE Electron Device Letters, vol. 36, no. 8, pp. 745-747, 2015.
[27] A. Firrincieli et al., "Study of ohmic contacts to n-type Ge: Snowplow and laser activation," Applied Physics Letters, vol. 99, no. 24, p. 242104, 2011.
[28] Z. Li et al., "Low Specific Contact Resistivity to n-Ge and Well-Behaved Ge n+/p Diode Achieved by Multiple Implantation and Multiple Annealing Technique," IEEE Electron Device Letters, vol. 34, no. 9, pp. 1097-1099, 2013.
[29] P. Bhatt et al., "High performance 400° C p+/n Ge junctions using cryogenic boron implantation," IEEE electron device letters, vol. 35, no. 7, pp. 717-719, 2014.
[30] M. Koike et al., "NiGe/n+-Ge junctions with ultralow contact resistivity formed by two-step P-ion implantation," Applied Physics Express, vol. 7, no. 5, p. 051302, 2014.
[31] C.-P. Chou et al., "Enabling low contact resistivity on n-Ge by implantation after Ti germanide," IEEE Electron Device Letters, vol. 39, no. 1, pp. 91-94, 2017.
[32] T. Abbas and L. Slewa, "Transmission line method (TLM) measurement of (metal/ZnS) contact resistance," Nanoelectronics and Materials ,2015.pp.111-120
[33] T. Liu et al., "Study on the measurement accuracy of circular transmission line model for low-resistance Ohmic contacts on III-V wide band-gap semiconductors," Current Applied Physics, vol. 18, no. 7, pp. 853-858, 2018.
[34] D.K. Schroder, Semiconductor material and device characterization. John Wiley & Sons,, Tempe, AZ, USA,p156-157,2015
[35] J. Klootwijk and C. Timmering, "Merits and limitations of circular TLM structures for contact resistance determination for novel III-V HBTs," in Proceedings of the 2004 International Conference on Microelectronic Test Structures, 2004, pp. 247-252: IEEE.
[36] J.-Y.J. Lin, "Low resistance contacts to n-type germanium," Stanford University Stanford, CA, Phd, USA, 2013.