低密度偶校碼(Low-Density Parity-Check Codes)已經被證實在足夠碼長下並且運行疊代訊息傳遞解碼(Iterative Message Passing Decoding) 時，能有接近薛農極限(Shannon limit)的表現，因此，近年來低密度偶校碼在通訊領域上備受矚目。類循環低密度偶校碼 (Quasi-Cyclic Low-Density Parity-Check Codes)是種常用的低密度偶校碼，其偶校矩陣具有良好的代數結構，且在實作上大幅降低硬體實現的複雜度。
　　傳統的低密度偶校碼屬於均等錯誤保護(Equal Error Protection)碼，無論資料的重要性，對於每個碼字元(codeword bit)的錯誤保護能力皆相同;而具有非均等錯誤保護(Unequal Error Protection)能力的低密度偶校碼，在不同區段內的碼字元有著不同程度的錯誤保護能力，可以根據資料的重要性，而選擇不同的保護能力。
　　一般而言，低密度偶校碼的解碼是基於總和-乘積演算法(Sum-Product Algorithm)而進行疊代訊息傳遞解碼。而傳統的解碼程序並沒有針對非均等錯誤保護能力的特性而做調整。在本論文中，我們提出合適非均等錯誤保護類循環低密度偶校碼的解碼排程調整，並且結合套用至幾種現有的解碼排程演算法上。從模擬結果可以驗證:套用我們提出的方法後，對於保護能力較差的碼字元，在固定的疊代次數下，能提供更好的效能。此外，對於平均的疊代次數也會減少，進而降低解碼的計算複雜度。

Low-density parity-check (LDPC) codes have been demonstrated to achieve near-capacity performance with iterative message-passing decoding and sufficiently long code length. Therefore, LDPC codes have attracted considerable attention because of their outstanding performance. Quasi-cyclic LDPC (QC-LDPC) codes with structured parity-check matrices are one type of LDPC codes. The advantages of QC-LDPC codes are efficient encoding/decoding and reduced complexity of very-large-scale integration (VLSI) implementation.

Traditional QC-LDPC codes provide equal error protection in the whole codeword; that is, each codeword bit exhibits the same performance regardless of its importance. QC-LDPC codes with unequal error protection (UEP) properties have different error-correcting capabilities for different parts of the codeword bits. The more important bits can have more protection.

LDPC decoding is usually executed by using iterative message-passing decoding based on the sum-product algorithm (SPA). However, conventional decoding algorithms were not designed for LDPC codes with UEP properties. In this thesis, we propose three decoding scheduling schemes for UEP QC-LDPC codes based on existing scheduling strategies. Simulation results are presented to verify that the proposed schemes can provide better bit error rate (BER)/block error rate (BLER) performance for a fixed number of iterations for subcodewords that are not on the higher protection levels. Furthermore, the average number of iterations can be reduced, thereby reducing the decoding computation complexity.

Abstract . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . i
Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .ii

1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

2 Low-Density Parity-Check Codes . . . . . . . . . . . . . . . . . . .4
2.1 De_nition to LDPC Codes . . . . . . . . . . . . . . . . . . . . . 4
2.2 Sum-Product Decoding Algorithm . . . . . . . . . . . . . . . . . 6
2.3 Shu_ed Decoding Algorithm . . . . . . . . . . . . . . . . . . . .10
2.4 Informed Dynamic Scheduling Decoding Algorithm . . . . . . . . . 11

3 Preliminaries for UEP QC-LDPC Codes . . . . . . . . . . . . . . . .14
3.1 Quasi-Cyclic Low-Density Parity-Check Codes . . . . . . . . . . .14
3.2 Masking for QC-LDPC Codes . . . . . . . . . . . . . . . . . . . .15
3.3 UEP QC-LDPC Codes via Masking . . . . . . . . . . . . . . . . . .16

4 Decoding Scheduling Schemes . . . . . . . . . . . . . . . . . . . .22
4.1 Decoding Scheme Based on Flooding Scheduling . . . . . . . . . . 22
4.2 Decoding Scheme Based on Shu_ed Scheduling. . . . . . . . . . . .26
4.3 Decoding Scheme Based on NVCRBP Scheduling. . . . . . . . . . . .28
4.4 Simulation Results. . . . . . . . . . . . . . . . . . . . . . . .29

5 Conclusion. . . . . . . . . . . . . . . . . . . . . . . . . . . . .41

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