隨機電報雜訊(Random Telegraph Noise)常見於小尺寸的電晶體元件結構當中，相較於大尺寸的元件較易被觀察到此種現象，這些元件譬如說：PN接面、場效電晶體、電阻式記憶體等等，其形成的原因主要與缺陷陷阱有關。而隨著電晶體微縮至今，隨機電報雜訊在小尺寸電晶體上的影響，已經足以成為可靠度的問題，無論是在類比電路還是數位電路的應用上，都會造成一定程度上的性能降低。
在本論文當中，探討了16奈米的N型鰭式場效電晶體在製程階段就已存在於介電層當中的製程缺陷陷阱，在施加不同的閘極電壓之下，缺陷陷阱捉放電子造成閘極電流高高低低隨機跳動的情形，即為閘極電流的隨機電報雜訊。並運用隨機電報雜訊的量測方法，分析電流維持在高態的平均時間(平均缺陷陷阱捕捉電荷所需要的時間)與電流維持在低態的平均時間(平均缺陷陷阱釋放電荷所需要的時間)彼此的相對應關係，進而找出缺陷陷阱在介電層內的深度位置以及能帶，提供給製程端做出相對應的改善，以提高電晶體的可靠度。

Random Telegraph Noise could normally be observed in small-sized devices, such as PN junction, MOSFET and RRAM, etc. The occurrence of it is mainly relevant to trap. With the scaling down of the transistor, the performance of the small-sized devices would decrease. The influence of reliability is caused by Random Telegraph Noise, regardless of analog or digital circuits.
This thesis will discuss the characteristic of process induced oxide trap in 16nm FinFET. The IG-RTN is a phenomenon of the trap capturing or emitting an electron, as different gate voltage applying on the device. The waveform will go up and down randomly. By using RTN measurement, this thesis can analyze the relationship between the average time of high-current (capture time) and the average time of low-current (emission time), and figure out the trap position and trap energy. Moreover, as we know the information, we can improve some process flow to get better performance of reliability.

致謝 i
摘要 ii
Abstract iii
內文目錄 iv
附圖目錄 vi
第一章 序論 1
1.1 電晶體起源及發展 1
1.2 摩爾定律 2
1.3 研究動機 4
1.4 論文架構 5
第二章 文獻回顧 6
2.1 電晶體微縮的挑戰 6
2.2 鰭式場效電晶體 9
2.3 閘極穿隧電流 12
2.3.1 直接穿隧 13
2.3.2 佛勒-諾得翰穿隧 14
2.4 隨機電報雜訊 15
第三章 量測儀器介紹與基本電性分析 23
3.1 量測儀器介紹 23
3.2 基本電性分析 25
3.2.1 N型2根鰭鰭式場效電晶體之基本電性 25
3.2.2 N型16根鰭鰭式場效電晶體之基本電性 30
第四章 隨機電報雜訊分析閘極缺陷陷阱實驗 35
4.1 實驗流程 35
4.2變壓量測實驗 36
4.2.1 陷阱深度分析 42
4.2.2 陷阱深度計算 44
4.3 變溫量測實驗 46
4.3.1 陷阱深度計算 49
4.3.2 活化能及逃脫能計算 55
第五章 總結 63
5.1 結論 63
5.2 未來展望 64
參考文獻 65

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