近年來，隨著可攜式技術及穿戴式裝置的快速發展，人們對於各式非揮發性儲存媒介的需求逐年提升。除了目前主流的快閃記憶體 (Flash memory)外，次世代記憶體包含相變化記憶體 (Phase Change Memory, PCM)、磁阻式隨機存取記憶體 (Magetoresistive random access memory, MRAM)以及電阻式隨機存取記憶體 (Resistive random access memory, RRAM) 也正被深入地研究。其中，具備結構簡單、優異相容性及高度微縮潛力等優勢的RRAM，被認為將在嵌入式儲存應用上佔據領先之地位。然而，在發展的過程中，RRAM遇到嚴重的變異性問題，造成其感測電路設計的困難。
本篇論文旨在了解RRAM的變異性來源，並提出各種解方，減輕變異性所帶來之影響。本篇研究以一高密度之接觸點電阻式隨機存取記憶體(Contact resistive random access memory, CRRAM)陣列對於RRAM之隨機特性進行統計分析。透過模型的方式，描述RRAM內部空缺的分布及雜訊特徵，並將模擬結果與CRRAM的量測數據進行比對，發掘變異性的來源。研究發現製程引起的空缺以及不受控制地產生導通路徑是導致CRRAM變異性的原因。而該變異性也被指控造成CRRAM操作上的不穩定，並拉低整個記憶體陣列的操作速度，甚至使得CRRAM喪失其循環操作的特性。本篇研究企圖透過改變製程及重置修正(Reset trimming)、重置修復(Reset recovery)的電性操作手法，解決該變異性問題。除此之外，亦提出一新型的偵測電路，於陣列中找出體質虛弱的記憶胞，以延長CRRAM的操作壽命。總的來說，透過本篇研究之成果，使得一嵌入式CRRAM記憶體陣列能長時間且高速的被操作。

Recently, due to the rapid development of portable technologies and wearable devices, the demands of various memory modules increase yearly. Beside mainstream flash memory, emerging memories including phase change memory (PCM), magetoresistive random access memory (MRAM), and resistive random access memory (RRAM) attract research interests from many memory technology developers. With advantages such as simple structure, excellent scalability, and good compatibility, resistive random access memory has been regarded with a dominant position in the market of embedded non-volatile storage applications. However, during maturing RRAM technologies, it also faces a critical challenge, variability, which increases the difficulties of sensing circuit design.
This dissertation aims to understand the origins of variability in RRAM, and further provides the solutions to mitigate the impacts of variability. Statistical analysis on stochastic natures of RRAM is collected from a compact contact RRAM (CRRAM) array. This study depicts the defect distributions and RRAM’s noise features by models, and further compares the simulation results and measurement data of CRRAM. Process-induced vacancies inside RRAM film and uncontrolled conductive paths generations are believed to be responsible for variabilities of CRRAM. The variabilities in CRRAM are found to cause unstable switching, slow down the speed of memory array, and even loss of CRRAM’s cyclability. The variability problems are addressed by changes of processes and two electrical treatments, named as reset trimming and reset recovery. Aside from electrical treatments, a new circuit scheme for early detection of the vulnerable cell in an array is also provided to extend CRRAM’s lifetime. The results of this dissertation ensure that an embedded contact RRAM array can be cycled in high-speed and stably for a long time.

Abstract i
摘要 iii
Acknowledge v
Table of Contents vii
List of Tables ix
List of Figures x
CHAPTER 1 Introduction 1
1.1 Challenges of Charge Based Memory 1
1.2 Introduction of Emerging Memories 2
1.3 Motivation 3
1.4 Dissertation Organization 4
CHAPTER 2 Review of Resistive Random Access Memory 6
2.1 Introduction 6
2.2 Operation Principles and Physical Mechanisms 7
2.3 Electron Trapping/de-trapping in Conductive Filaments 8
2.4 Variability Challenges in RRAM 10
2.5 Summary 11
CHAPTER 3 Contact Resistive Random Access Memory (CRRAM) & Its Initial State Variation 23
3.1 Introduction 23
3.2 Cell and Basic Characteristics 24
3.2.1 Cell Structure and Fabrication 25
3.2.2 Resistive Switching Behaviors 26
3.2.3 Initial State Variation in Memory Array 27
3.3 Intrinsic Oxygen Vacancy Model 28
3.4 Non-uniform Forming Process 30
3.5 Summary 33
CHAPTER 4 Reset Efficiency in Backfilled Contact Resistive Random Access Memory (BCRRAM) 54
4.1 Introduction 54
4.2 Characterization of BCRRAM 56
4.2.1 Cell Structure and Fabrication 56
4.2.2 Initial State Comparison between CRRAM/BCRRAM 57
4.2.3 DC/AC Analysis 58
4.3 Filament Type and Read Current Noise 59
4.3.1 Noise Characteristics 59
4.3.2 Monte Carlo Simulation 61
4.4 Correlation between Noise, Filament, and Reset Efficiency 62
4.5 Reset Trimming Scheme 63
4.6 Summary 64
CHAPTER 5 Early Detection Circuit of Vulnerable Cell 88
5.1 Introduction 88
5.2 Change in Conductive Filament during Cycling 89
5.2.1 Incremental Step Pulse Programming Algorithm 89
5.2.2 Reset Efficiency and Read Window 90
5.2.3 Cycling Induced Filament Change 90
5.3 Reset Recovery Method 91
5.4 Array Cycling Lifetime Detection 92
5.4.1 Buffer Gate Method 92
5.4.2 Schmitt Triggers Method 92
5.4.3 Performance comparison of two schemes 93
5.5 Effectiveness of Early Detection Circuit 93
5.6 Summary 94
CHAPTER 6 Conclusion 110
6.1 Conclusion 110
References 113

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