隨著電子科技的發展，將記憶體整合至單一晶片已是一個重要的議題，而這類嵌入式記憶通常需要相容於CMOS邏輯製程，意味著不需要額外的光罩與成本便可與其他電路整合。隨著製程微縮，先進製程紛紛採用立體結構FinFET製程，然而，僅有少數幾種非揮發性記憶體可相容於此製程。本論文提出一種符合FinFET邏輯製程的新型N通道可多次寫入非揮發性記憶體，並採用差動式的結構使其克服製程微縮下的資料保存性問題。
新型N通道差動式記憶體由一個選擇電晶體及兩個浮動閘極組成，並透過接觸與金屬閘極間的電容進行側向耦合，提高此記憶體的控制力。此記憶體採用通道熱電子注入進行編程，利用Fowler-Nordheim穿隧效應進行電性抹除，並可成功在3.3V進行低電壓行操作。此元件經過寫入抹除循環測試，表現出高度的穩定性與可靠性。此元件的資料保存性並不足以達到一般的電子商品標準，在本篇論文中亦提出一個自我修復的機制已延續其資料保存的生命週期。此新型記憶體具有低壓操作的能力，並擁有良好的操作特性與耐久度，利用其差動式結構亦可提高其資料保存性，為符合FinFET邏輯製程的系統整合晶片提供新的選擇與應用。

With the growth of electronic products, the integration of the memory module to a chip is an important issue. These embedded memories must be compatible with CMOS logic process, namely, it can be integrated with other circuits without additional mask and cost. When the technology scales down, the advanced process selects 3D structures such as FinFET structures to overcome some problems such as gate contorl capability degradation or increase of leakage current. A few non-volatile memories can be fully compatible with the FinFET logic process. This study proposes a new n-channel multiple-time programming memory cell with a differential structure to overcome the data retention problem.
The new n-channel differential multiple-time programming memory is composed of one select transistor and two floating gates. It enhances the controllability by laterally coupled capacitance between the slot contacts and the metal gate. This cell is programmed by channel hot electron injection to program the cell, and erases by Fowler-Nordheim tunneling, under 3.3V. The cell also shows good endurance up to 100k P/E cycles. Data retention capability of this cell is the worst challenging problem for maintaining data non-volatility. Therefore, the study proposes a self-recovery mechanism to enhance the data lifetime. This memory cell can operate at low voltage and good operation performance and endurance, it can also improve the data retention in a differential structure, make it be a promising solution for the embedded memory in FinFET logic process.

摘要 i
Abstract ii
致謝 iii
內文目錄 iv
附圖目錄 vi
附表目錄 viii
第一章 緒論 1
1.1邏輯非揮發性記憶體介紹及應用 1
1.2論文大綱 2
第二章 FinFET製程下的非揮發性記憶體 5
2.1 電阻式記憶體 5
2.2 反熔絲 6
2.3 載子注入機制回顧 7
2.4 小結 9
第三章 新型差動式側向耦合多次寫入記憶體結構與操作原理 14
3.1 記憶體元件結構與製程 14
3.2 差動式記憶體之操作流程 16
3.3 記憶體元件操作機制 17
3.4小結 18
第四章 新型差動式側向耦合多次寫入記憶體量測結果 31
4.1差動式記憶體元件基本操作 31
4.2元件可靠度分析 34
4.3小結 37
第五章 資料可靠度最佳化 50
5.1資料流失機制 50
5.2 增進資料可靠度之方法 51
5.3 小結 53
第六章 結論 62
6.1 新元件與其他相容於FinFET邏輯製程的非揮發性記憶體比較… 62
6.2 結語與未來展望 62
參考文獻…..……………………………………………………………….64

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