帳號:guest(3.135.220.208)          離開系統
字體大小: 字級放大   字級縮小   預設字形  

詳目顯示

以作者查詢圖書館館藏以作者查詢臺灣博碩士論文系統以作者查詢全國書目
作者(中文):王聖皓
作者(外文):Wang, Sheng-Hao.
論文名稱(中文):一個以規則為主的有效佈局圖案搜尋演算法
論文名稱(外文):An Efficient Algorithm for Rule-Based Layout Pattern Matching
指導教授(中文):王廷基
指導教授(外文):Wang, Ting-Chi
口試委員(中文):江蕙如
李尚貽
口試委員(外文):Jiang, Hui-Ru
Lei, Seong-I
學位類別:碩士
校院名稱:國立清華大學
系所名稱:資訊工程學系所
學號:104062640
出版年(民國):106
畢業學年度:105
語文別:中文
論文頁數:31
中文關鍵詞:圖案搜索可生產性設計電路佈局驗證
外文關鍵詞:Pattern searchDesign for manufacturabilityDesign rule check
相關次數:
  • 推薦推薦:0
  • 點閱點閱:623
  • 評分評分:*****
  • 下載下載:26
  • 收藏收藏:0
隨著特徵尺寸的不斷縮小,設計複雜度繼續增加,可生產性的設計意識變得越來越重要。以規則為主的佈局圖案搜尋被認為是驗證佈局的一個實用方法,但與傳統方法不同,本論文著重於三種間距規則,並提出了一個有效佈局圖案搜尋演算法。給定一個佈局和一組規則,我們的演算法首先採用掃描線法掃描佈局兩次以檢查每個給定的規則,這會使我們收集到所有滿足規則的多邊形配對。藉由將所有給定佈局中的多邊形拆解為線段,我們的演算法可以快速的執行比較,並獲得正確的答案而不會錯過每個給定的規則。然後使用遞迴的方法來找出所有滿足給定規則的圖案。實驗結果表明,我們的方法不僅可以找到與商業軟體相同的答案,而且運行速度明顯地更快。
As the feature size continues to shrink and the design complexity continues to increase, manufacturability-aware layout design is becoming more and more important. Rule-based pattern matching is considered as a practical approach for verifying a layout, but unlike traditional ones, this thesis focus on three kinds of spacing rules and presents an efficient pattern matching algorithm. Given a layout and a set of rules, our algorithm first adopts a line sweep method to scan the layout twice such that for each given rule, it collects all pairs of polygons satisfying that rule. By disassembling all the polygons in the given layout into segments, our algorithm can rapidly perform sufficient comparisons and get an accurate solution without any miss for each given rule. It then uses a recursive method to find all layout patterns each of which meets the given set of all rules. Experimental results show that our algorithm can not only find the same solution as a commercial tool, but also run significantly faster.
1 Introduction 1
2 Problem Formulation 7
3 Our Approach 10
3.1 Data Structure Construction 13
3.2 Line Sweep Rule Check 13
3.3 Pattern Search 18
4 Experimental Results 22
5 Conclusion 29
[1] Y.-T. Yu, Y.-C. Chan, S. Sinha, I. H.-R. Jiang, and C. Chiang, “Accurate process-hotspot detection using critical design rule extraction,” in Proceedings Design Automation Conference, pp. 1163–1168, 2012.

[2] J. W. Park, R. Todd, and X. Song, “Geometric pattern match using edge driven dissected rectangles and vector space,” IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 35, no. 12, pp. 2046–2055, 2016.

[3] F. Pikus, “Topological pattern matching.” U.S. Patent 018 594 A1, Jul. 2010. [4] F. Gennari, “Fast pattern matching.” U.S. Patent 7 818 707, Oct. 2010.

[4] F. Gennari, “Fast pattern matching.” U.S. Patent 7 818 707, Oct. 2010.

[5] H.-Y. Su, C.-C. Chen, Y.-L. Li, A.-C. Tu, C.-J. Wu, and C.-M. Huang, “A novel fast lay- out encoding method for exact multilayer pattern matching with prufer encoding,” IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 34, no. 1, pp. 95–108, 2015.

[6] D. Ding, J. Torres, A, G. Pikus, F, and Z. Pan, D, “High performance lithographic hotspot detection using hierarchically refined machine learning,” in Proceedings of Asia and South Pacific Design Automation Conference, pp. 775–780, 2011.

[7] J.-Y. Wuu, F. G. Pikus, A. Torres, and M. Marek-Sadowska, “Rapid layout pattern classifica- tion,” in Proceedings of Asia and South Pacific Design Automation Conference, pp. 781–786,
2011.


[8] W.-Y. Wen, J.-C. Li, S.-Y. Lin, J.-Y. Chen, and S.-C. Chang, “A fuzzy-matching model with grid reduction for lithography hotspot detection,” IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 33, no. 11, pp. 1671–1680, 2014.

[9] Y.-T. Yu, G.-H. Lin, I. H.-R. Jiang, and C. Chiang, “Machine-learning-based hotspot detec- tion using topological classification and critical feature extraction,” IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 34, no. 3, pp. 460–470, 2015.


[10] P. Gupta, A. B. Kahng, S. Nakagawa, S. Shah, and P. Sharma, “Lithography simulation- based full-chip design analyses,” in Proceedings of Society of Photographic Instrumentation Engineers, vol. 6156, 2006. Art. ID 61560T.

[11] J.-Y. Wuu, F. G. Pikus, A. Torres, and M. Marek-Saowska, “Detecting context sensitive hotspots in standard cell libraries,” in Proceedings of Society of Photographic Instrumentation Engineers, vol. 7275,727515, 2009.

[12] A. B. Kahng, C.-H. Park, and X. Xu, “Fast dual graph based hotspot detection,” in Proceed- ings of Society of Photographic Instrumentation Engineers, vol. 6349, 2006. Art. ID 63490H.

[13] H. Yao, S. Sinha, C. Chiang, X. Hong, and Y. Cai, “Efficient process hotspot detection using range pattern matching,” in Proceedings of International Conference On Computer Aided Design, pp. 625–632, 2006.

[14] R. O. Topaloglus, ICCAD-2016 Contest - Pattern Classification for Integrated Circuit Design
Space Analysis. http://cad-contest-2016.el.cycu.edu.tw/Problem_C/default.html/.

[15] J. Nievergelt and F. P. Preparata, “Plane-sweep algorithms for intersecting geometric figures,”
Communications of the ACM., vol. 25, no. 10, 1982.
 
 
 
 
第一頁 上一頁 下一頁 最後一頁 top
* *