由於半導體技術在提升處理器速度上面臨了物理的限制及整體環境對計算性能不斷增長的需求，
包含中央處理器和多種硬體加速器等計算資源的異構計算平台逐漸成為現今的趨勢。
學術界中許多關於優化策略的研究應運而生，希望能夠在降低異質系統的能量消耗下獲得更好的資料生產量。
其中，記憶體相關技術，諸如DRAM，STT-RAM和RRAM被發展來幫助實現這個目標。
與此同時，OpenCL提供了在異質架構系統中為多種硬體加速器撰寫的開放程式語言標準。
在本篇論文中，我們提出了一個基於OpenCL的、新的靜態分析技術，可以協助確定程序中物件的讀/寫特性。
我們考量在擁有DRAM和RRAM的計算配置環境下，嘗試解決將哪些變數儲存於RRAM能夠最有利於能效的問題。
我們提出的基於記憶體靜態單賦值形式編譯器層的分析能夠處理有指針的程序。
實驗評估的結果顯示我們所提出的分析平均誤差為0.355，
而從中獲得的讀/寫資訊具有實現高節能的潛力。
此外，與實驗中的基準系統相比較，
讀/寫資訊有助於每個內核達到平均43.61％的節能效果。

Heterogeneous computing platforms containing a wide range of computing resources from CPUs to specialized hardware accelerators is the trend today resulting from the physical limitations on processors speed and the increasing demand for computing performance. Hence many optimization strategies are studied to get better throughput and lower energy consumption in heterogeneous systems. Various memory technologies such as DRAM, STT-RAM, and RRAM are also developed to help reach the goal. Meanwhile OpenCL is an open programming language standard for programmers to write programs on these hardware accelerators in a heterogeneous system.
In this thesis, a new static analysis technique, which is based on OpenCL programming languages, can determine read/write characteristics of instances within the program is presented. We consider the computing configuration with both DRAM and RRAM. We try to answer the question of which variables stored on RRAM will benefit energy efficiency the best. Our compiler scheme based on our enhanced Memory SSA enables the analysis to cover pointer-based programs. Our evaluation demonstrates that the read/write information obtained from the proposed design has great potential to achieve high energy-savings. The average error distance of our proposed scheme is 0.355. In addition, compared to the baseline system, the read/write information help gain average 43.61\% energy-saving per kernel.

Abstract i
Contents iii
List of Figures v
List of Tables vi
1 Introduction 1
1.1 Introduction............................ 1
1.2 Overview of the Thesis...................... 2
2 Background 5
2.1 OpenCL.............................. 5
2.2 RRAM............................... 7
2.3 Static Single Assignment Form.................. 8
2.3.1 Memory SSA ....................... 9
3 Hierarchical Read/Write Analysis 13
3.1 Main Algorithm: Hierarchical Read/Write Analysis . . . . . . 14
3.2 Hierarchical-address-space Sensitive Alias Analysis Algorithm 16
3.3 EvaluateAccessCount Algorithm................. 16
4 Enhanced Memory SSA 21
4.1 Enhanced Memory SSA Implementation . . . . . . . . . . . . 21
4.2 Usage Scenarios.......................... 25
4.2.1 Hierarchical read/write analysis . . . . . . . . . . . . . 25
4.2.2 Divergence analysis ................... 27
5 Experimental Methodology and Results 32
5.1 Experimental Methodology.................... 32
5.2 Experimental Results....................... 33
5.2.1 Accuracy of provided read/write information . . . . . . 33
5.2.2 Data memory energy-saving from provided read/write information ........................ 35
6 Conclusion and Future Works 37
6.1 Conclusion............................. 37
6.2 Future Works ........................... 38

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