在次世代的光刻技術中，嵌段共聚物引導式自組裝的出現讓其成為一個較經濟的替代技術。尤其引導式自組裝具有製造接觸孔洞和導通孔的良好潛力。但是，10奈米以下的製程技術所導致的高密度導通孔，使得單純使用引導式自組裝來製造所有的導通孔變成一件非常困難的事情。結合多重圖像法的技術和引導式自組裝來解決這樣的問題是一種可行的選擇，也就是利用多重光罩來製造用於引導嵌段共聚物的自組裝所需要的引導式自組裝之引導模板。此外，因為冗餘導通孔插入是一個可以有效提升製造性以及因為導通孔瑕疵而損失的良率，使其成為值得採用的技術。根據我們的了解，我們是第一個對在考量虛擬導通孔的輔助下之引導式自組裝暨多重圖案法之分解及冗餘導通孔插入來提升製造性的領域投入相關研究的團隊。實驗結果顯示，我們提出的方法較先前的研究更有效且更有效率，在所有的基準上皆可製造所有的導通孔。

Block copolymer directed self-assembly (DSA) has emerged as an economical complementary technology in the midst of next generation lithography. In particular, DSA has a strong potential for contact hole and via patterning. However, high via density in sub-10nm technology node makes it very hard to manufacture all the vias using DSA only. Complementing DSA with multiple patterning (MP) is an option such that multiple masks are used to print the DSA guiding templates for guiding the self-assembly of the block copolymer. Besides, redundant via insertion is desirable because it is an effective means to reduce yield loss due to via defect and improve reliability. To the best of our knowledge, we are the first work to consider DSA-MP decomposition and redundant via insertion with dummy via consideration to enhance manufacturability. Experimental results shows the effectiveness and efficiency of our method compared with previous works and resulted in 0 unmanufacturable vias for all benchmarks.

誌謝 v
Acknowledgements vii
摘要 ix
Abstract xi
1 Introduction 1
1.1 Block Copolymer Directed Self-Assembly . . . . . . . . . . . . . . . . 1
1.2 Via Manufacturability . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.3 Previous Works . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
1.4 DSA-MP with Redundant Via and Dummy Via . . . . . . . . . . . . . 2
1.5 Contribution . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
1.6 Organization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2 Preliminaries 5
2.1 Guiding Template Assignment . . . . . . . . . . . . . . . . . . . . . . 5
2.2 Redundant Via and Dummy Via Insertion . . . . . . . . . . . . . . . . 6
2.3 Problem Formulation . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
3 Algorithm 9
3.1 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
3.2 Preprocessing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
3.3 ILP Formulation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
3.4 Speed-up Technique . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
4 Experimental Results 17
5 Conclusion 21
References 23

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