帳號:guest(3.138.69.214)          離開系統
字體大小: 字級放大   字級縮小   預設字形  

詳目顯示

以作者查詢圖書館館藏以作者查詢臺灣博碩士論文系統以作者查詢全國書目
作者(中文):黃冠庭
作者(外文):Hanug, Kaung-Ting
論文名稱(中文):高強度屏蔽奈米化矽基板之應力控制以抑制氮化鎵磊晶後基板翹曲
論文名稱(外文):Stress control of high strength sealed nanotextured silicon wafer to resist warpage after GaN epitaxy
指導教授(中文):葉哲良
指導教授(外文):Yeh, J. Andrew
口試委員(中文):侯帝光
林育芸
徐文慶
口試委員(外文):Hou, Max T.
Lin, Yu-Yun
Hsu, Wen-Ching
學位類別:碩士
校院名稱:國立清華大學
系所名稱:奈米工程與微系統研究所
學號:104035510
出版年(民國):106
畢業學年度:105
語文別:中文
論文頁數:80
中文關鍵詞:矽基氮化鎵奈米化強度提升應力控制磊晶
外文關鍵詞:GaN-on-Sinanotexturingstrength enhancementstress controlepitaxy
相關次數:
  • 推薦推薦:0
  • 點閱點閱:556
  • 評分評分:*****
  • 下載下載:9
  • 收藏收藏:0
氮化鎵(GaN)為非常熱門且發展性極高的的半導體材料,目前大部分利用外延性磊晶生長(Epitaxy)製得,使磊晶用基板成為重要的研究對象,其中矽基板因技術獲得突破、加工技術成熟且成本相對低廉逐漸受到矚目成為磊晶用基板的趨勢,因其具有可大尺寸成長(large-scale growth) 及大規模生產(mass production) 的優點,使矽基板於多種磊晶片的選項中更具競爭力。但GaN on Si仍因為異質材料會衍生出許多問題,其中因材料熱不匹配所導致的氮化鎵磊晶過程中基板翹曲(warpage)程度的大量變化導致基板或氮化鎵薄膜破裂的問題 尤其嚴重。
本研究主要透過利用奈米結構分散應力的效果提升基板強度並控制保護層
應力,以克服氮化鎵磊晶時之應力,使目前業界常用於磊晶氮化鎵之6 吋矽基板的厚度1000 μm 減薄至一般積體電路製程機台承載的標準片厚度675 μm,同時磊晶後之氮化鎵特性預期維持與1000 μm 厚度基板相同,並於奈米結構上沉積由二氧化矽、非晶矽薄膜構成之保護層,並控制此保護層應力,使此保護層除了能達到屏蔽奈米結構的效果,更能降低氮化鎵磊晶後基板翹曲,使後續製成能順利進行,另外透過deep-RIE改善奈米結構製備或改變保護層材料為氮化矽,解決新型基板側邊容易產生回融蝕刻的問題。本實驗之最終目標為研發高強度之氮化鎵磊晶用矽基板,基板製備完成後磊晶3.4 μm 氮化鎵並於其上製作簡易電晶體,後續實驗將與市售之一般675 μm 及1000 μm 氮化鎵磊晶片比較,對新型基板之強度提升效果及應用可行性。
Gallium nitride (GaN) is a very great and growth-oriented semiconductor material in recent years, which is mostly growth by epitaxy in industry. It makes the substrate for epitaxy GaN become a big issue. Among different kinds of substrates, Silicon is very competitive because of the breakthrough technology, mature fabrication technique and low cost, and also because Si substrate processes the advantages of large scale growth and mass production. But GaN-on-Si still derives many problems because of Heterogeneous materials. The most serious problem is the large amount of warping change in the GaN epitaxy process, it will cause the crack of Si substrate or GaN thin film.
This research is mainly focus on enhancing the strength of Si substrate by the stress distribution effect of nanostructure and control the stress of the protecting layer, to overcome the stress induced by GaN epitaxy.We fabricate nanostructure on Si wafer to thinner the thickness of 6 inch Si wafer used for epitaxy GaN from 1000 μm to 675μm, which is the compliant thickness industry using, and the GaN film properties on nanotextured substrate are expected to be the same with which on 1000 μm substrate. Furthermore deposit the covering layer composed of silicon dioxide and amorphous-silicon on nanostructure and control the stress of the covering layer. Therefore, the covering layer achieve the desired effects to protect nanostructure from destroyed and to reduce the warping condition after GaN epitaxy.
The ultimate goal of this research is to create a high strength GaN-on-Si substrate. After preparation of the substrate, epitaxy 3μm thin film and then fabrication simple transistor on the thin film. Finally, verifies its feasibility by comparing the properties of GaN and transistor with normal 1000 μm and 675 μm substrates.
摘要 I
Abstract II
誌謝 III
圖目錄 VI
表目錄 VIII
符號表 IX
第一章 緒論 1
1.1研究背景 1
1.2 矽基氮化鎵之挑戰 5
1.3文獻回顧 16
1.3.1應力消彌技術 (Stress engineering) 16
1.3.2矽基板強度提升技術 22
1.3.3屏蔽式奈米化矽基板 26
1.4 研究動機與目標 29
第二章 原理及理論 31
2.1基礎理論 31
2.1.1奈米結構之強度提升及應力分散效應 31
2.1.2保護層材料與基板之應力分析 35
2.2製程原理 36
2.2.1 金屬輔助化學蝕刻 36
2.2.2 非等向性離子式蝕刻(deep-RIE) 40
2.2.3化學氣相沉積 41
第三章 實驗因果關係與規劃 45
3.1實驗設計及流程 45
3.2矽(111)基板製備奈米結構 49
3.2.1 銀離子輔助蝕刻製備奈米結構 49
3.2.2非等向性離子式蝕刻製備奈米結構 50
3.3二氧化矽保護層及非晶矽保護層沉積實驗 51
3.3.1常壓化學氣相沉積(Atmospheric pressure CVD, APCVD) 51
3.3.2電漿增強化學氣相沉積 (Plasma-Enhanced CVD, PECVD) 51
3.3.3高密度電漿化學氣相沉積(High Density Plasma CVD, HDPCVD) 52
第四章 實驗結果討論 53
4.1矽111基板製備奈米結構實驗 53
4.1.1銀離子輔助蝕刻製備奈米結構實驗 53
4.1.2非等向性離子式蝕刻(deep-RIE)製備奈米結構實驗 54
4.2保護層薄膜沉積實驗 58
4.2.1 APCVD二氧化矽薄膜沉積 58
4.2.2 PECVD二氧化矽薄膜沉積-參數分析 59
4.2.3 HDPCVD 非晶矽薄膜沉積 64
4.2.4 PECVD氮化矽薄膜沉積 65
4.3保護層薄膜應力 67
4.4晶邊保護層 71
第五章 結論與未來工作 73
第六章 參考文獻 76

1. B.Gil, III-Nitride Semiconductors and their Modern Devices, 2013.
2. K. Kashyap, A. Kumar, C. T. Huang, Y. Y. Lin, M. T. Hou & J. A. Yeh, Elimination of strength degrading effects caused by surface microdefect: A prevention achieved by silicon nanotexturing to avoid catastrophic brittle fracture. Scientific Reports, Jun 2015.
3. HIS Markit, GaN-on-Silicon LEDs Forecast to Increase Market Share to 40 Percent by 2020. Newsroom, 2013.
4. Yole Development, Power GaN Market 2014. June 2014.
5. A. Dadgar, S. Fritze, O. Schulz, J. Henniga, M. Kunzec, I. Daumiller, K. Haberland, A. Krost, H. Witte, A. Diez, U. Heinle, Anisotropic bow and plastic deformation of GaN on silicon. Journal of Crystal Growth, May 2013. 370: p. 278-281.
6. S. Pal and C. Jacob, Silicon - a new substrate for GaN growth. Bulletin of Materials Science, Dec 2004.
7. T. Paskova, D. A. Hanser, and K. R. Evans, GaN Substrates for III-Nitride Devices. Proceedings of the Ieee, Jul 2010. 98: p. 1324-1338.
8. A. Krost and A. Dadgar, GaN-based optoelectronics on silicon substrates. Materials Science and Engineering B-Solid State Materials for Advanced Technology, May 2002. 93: p. 77-84.
9. M. Gonzalez , K. Cheng , P. Tseng , G. Borghs, GaN growth on patterned silicon substrates. A thermo mechanical study on wafer bow reduction. Thermal, Mechanical and Multi-Physics Simulation and Experiments in Microelectronics and Microsystems (EuroSimE), 2012: p. 1-6.
10. M. Ohring, Materials science of thin films, Academic press, 2001.
11. S. L. Tian, 光學薄膜應力與熱膨脹係數量測之研究. 博士, 2001.
12. W. X. Haung , 製程參數對薄膜應力影響之研究. 博士, 2001.
13. J.M. Hodgkinson, Mechanical testing of advanced fibre composites. Elsevier, 2000.
14. T. Takeuchi, H. Amano, K. Hiramatsu, N. Sawaki, and I. Akasaki, Growth of Single Crystalline Gan Film on Si-Substrate Using 3c-Sic as an Intermediate Layer. Journal of Crystal Growth, Dec 1991. 115: p. 634-638.
15. J. W. Yang, C. J. Sun, Q. Chen, M. Z. Anwar, M. A. Khan, S. A. Nikishin, High quality GaN-InGaN heterostructures grown on (111)silicon substrates. Applied Physics Letters, Dec 1996. 69: p. 3566-3568.
16. Compound Semiconductor Taiwan, 以大尺寸矽晶圓降低LED 成本. 2013.
17. N. Perkins, M. Horton, Z. Bandic, T. McGill, and T. Kuech, Halide vapor phase epitaxy of gallium nitride films on sapphire and silicon substrates. MRS Proceedings, 1995: p. 243.
18. A. Watanabe, T. Takeuchi, K. Hirosawa, H. Amano, K. Hiramatsu, and I. Akasaki, The Growth of Single Crystalline Gan on a Si Substrate Using Aln as an Intermediate Layer. Journal of Crystal Growth, Mar 1993. 128: p. 391-396.
19. P. Kung, A. Saxler, X. Zhang, D. Walker, T. C. Wang, I. Ferguson, High-Quality Aln and Gan Epilayers Grown on (00.1) Sapphire, (100), and (111) Silicon Substrates. Applied Physics Letters, May 1995. 66: p. 2958-2960.
20. H. Amano, N. Sawaki, I. Akasaki, and Y. Toyoda, Metalorganic vapor phase epitaxial growth of a high quality GaN film using an AlN buffer layer. Applied Physics Letters, 1986. 48: p. 353-355.
21. S. A. Nikishin, N. N. Faleev, V. G. Antipov, S. Francoeur, L. G. Peralta, G. A. Seryogin, High quality GaN grown on Si(111) by gas source molecular beam epitaxy with ammonia. Applied Physics Letters, Oct 1999. 75: p. 2073-2075.
22. K. Y. Zang, S. J. Chua, L. S. Wang, C. V. Thompson, Evolution of AlN buffer layers on Silicon and the effect on the property of the expitaxial GaN film. this proceedings, 1989.
23. D. K. Kim, Effect of AlN buffer thickness on stress relaxation in GaN layer on Si (111). Solid-State Electronics, 2007. 51: p. 1005-1008.
24. E. Feltin, B. Beaumont, M. Laugt, P. Mierry, P. Vennegues, H. Lahreche, Stress control in GaN grown on silicon (111) by metalorganic vapor phase epitaxy. Applied Physics Letters, Nov 2001. 79: p. 3230-3232.
25. T. Szymański, M. Wośko, M. Wzorek, B. Paszkiewicz and R. Paszkiewicz, Stress engineering in GaN structures grown on Si(111) substrates by SiN masking layer application. Journal of Vacuum Science & Technology A, Jul 2015. 33.
26. W. D. Callister and D. G. Rethwisch, Fundamentals of materials science and engineering: an integrated approach. 2012.
27. F. Shimura, Semiconductor silicon crystal technology. Elsevier, 2012.
28. L.C. Zheng, Mechanical & Transistor Properties of Flexible P-MOSFET Wafers Strengthened by Nanostructure on Backside. Master, 2014.
29. J. F. Ziegler, Ion Implantation Science and Technology 2e. Elsevier, 2012.
30. T. Mikolajick and W. M. Weber, The Research of Nanowires on Silicon. 2014.
31. Y. Hsu, 6-inch GaN Growth on Silicon Substrates Strengthened by Sealed Nanotextures. 2016 .
32. AZO Materials, Silica - Silicon Dioxide (SiO2). 2001.
33. W. R. Runyan and K. E. Bean, Semiconductor integrated circuit processing technology. 1990.
34. A. Peng, Covered Nanotexturing for High Strength Silicon Substrate Applied in IC Industry. Master, 2015.
35. E. Donovan, F. Spaepen, D. Turnbull, J. Poate, and D. Jacobson, Heat of crystallization and melting point of amorphous silicon. Applied Physics Letters, 1983. 42: p. 698-700.
36. C. N. Chen, C. T. Huang, C. L. Chao, T. K. Hou, W. C. Hsu, and J. A. Yeh, Strengthening for sc-Si solar cells by surface modification with nanowires. Journal of Microelectromechanical Systems, 2011. 20: p. 549-551.
37. G. Wu, Silicon Substrate for GaN Epi-Growth by Stress Compensation Layer and Nanostructure Technique. Master, 2015.
38. H. Xiao, Semiconductor process technology. 2012: p. 325-337.
39. AZO Materials, Applications of Metal Halide Precursors in CVD/ALD Processes. May 2013.
40. M. S. Haque,H. A. Naseem,W. D. Brown, Residual stress behavior of thin plasma-enhanced chemical vapor deposited silicon dioxide films as a function of storage time. Journal of Applied Physics, 1997. 81(7): p. 3129-3133.
41. P. F. Min and S. H. Li, Extremely low stress UV-transparent Silicon nitride films deposited by plasma enhanced chemical vapor deposition. July 2000.
42. R. Charavel, B. Olbrechts, J. P. Raskin, Stress release of PECVD oxide by RTA. SPIE, 2003. 5116: p. 11.
43. X. Zhang, K. S. Chen, and S. M. Spearing, Thermo-mechanical behavior of thick PECVD oxide films for power MEMS applications. Sensors and Actuators A: Physical, 2003. 103(1–2): p. 263-270.
44. R. Mises, Mechanics of the ductile form changes of crystals. Zeitschrift Fur Angewandte Mathematik Und Mechanik, 1928. 8: p. 161-185.
45. S. Nishino, J. A. Powell, and H. A. Will, Production of Large-Area Single-Crystal Wafers of Cubic Sic for Semiconductor-Devices. Applied Physics Letters, 1983. 42: p. 460-462.
46. ToHo Techology Corporation, FLX 2320-S, 2003.
47. S. Kuo, X. Zhang and S. Lin, Intrinsic stress generation and relaxation of plasma-enhanced chemical vapor deposited oxide during deposition and subsequent thermal cycling. Thin Solid Films, 2003.434: p. 190-202.
48. M. S. Haque, H. A. Naseem, and W. D. Brown, Correlation of stress behavior
with hydrogen-related impurities in plasma-enhanced chemical vapor
deposited silicon dioxide films. Journal of Applied Physics,1997. 82.
49. A. Masolin, P. B. Roberto, and M. Bernacki, Thermo-mechanical and fracture properties in single crystal silicon. Journal of Materials Science,2012. 48: p. 979-988.
 
 
 
 
第一頁 上一頁 下一頁 最後一頁 top
* *