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作者(中文):李 帥
作者(外文):Ramachandran, Velsankar
論文名稱(中文):針對電子封裝中SAC錫球潛變破壞之修正型亞蘭德模型可行性研究
論文名稱(外文):Feasibility Study on Modified Anand model for Failure assessment of SAC Solder Joints in Electronic packages
指導教授(中文):江國寧
指導教授(外文):Chiang, Kuo-Ning
口試委員(中文):蔡明義
趙儒民
涂季平
口試委員(外文):Tsai, MIng-Yi
Chao, Ru-Min
Tu, Jie Ping
學位類別:碩士
校院名稱:國立清華大學
系所名稱:動力機械工程學系
學號:103033709
出版年(民國):106
畢業學年度:105
語文別:英文
論文頁數:68
中文關鍵詞:晶圓級晶片尺寸封裝限單元素模擬法加速熱循環Modified-Anand模型
外文關鍵詞:WLCSPPrimary CreepAccelerated Thermal CyclingAnand ModelFinite elementStrain rate effect
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由於積體電路(IC)之製造、小尺寸和低成本等因素,在半導體封裝產業中,晶圓級晶片尺寸封裝(Wafer Level Chip Scale Package, WLCSP)發展日新月異。相較於傳統的打線接合,此封裝技術在晶片數量高時,能有較低的成本。當每個晶片的I/O數增加(亦即晶片尺寸與至中心點的距離增加),矽晶圓與PCB熱膨脹係數(CTE)不同導致的應力集中現象更為嚴重,也將導致錫球壽命大幅縮短。
  加速熱循環(Accelerated thermal cycling, ATC)目前已被廣泛應用於微電子可靠度之壽命評估。近年來,隨著電腦性能和模擬技術的高度進程,數值分析方法不僅被愈來愈多的設計人員採納,更具有解決電子封裝相關問題之潛力。本研究將藉由有限單元素模擬法分析熱循環負載下,WLCSP中之錫球潛變行為。本研究使用超大型晶片,14mm x 14mm全陣列WLCSP,0.4mm球距,0.25mm球徑與96.5Sn-3.5Agball材料作探討,並根據JEDEC標準測試規範,選擇-40°C到125°C的溫度區間,10分鐘的持溫時間和每分鐘16.5°C分鐘的升降速率用於模擬結果驗證。
  近年來,一些研究人員發現於低應變時,若使用Anand模型公式中的九個參數做計算,將造成極大差異。此外,相較於Hyperbolic Sine Model,該模型在適當的技術細節方面缺乏應用。實際上,它已經指導了數個地方用戶定義潛變模型,然其定制代碼卻無法應用於許多商業有限元素工具上。因此,修改當前的Anand模型,以更佳地評估電子封裝可靠性已然為一項重要任務。
  在本研究中,基於瞬態穩態潛變形式的假設,發展出另一全新的潛變模型來傳遞演化項,並得到包含四個參數的潛變方程。此外,其基本論述與眾所周知的Hyperbolic Sine Model相似,故此提出的模型平易近人且能廣泛應用。為了更容易了解熱循環負載期間WLCSP的無鉛錫球潛變行為,本研究分析了兩種模型下的潛變應變範圍,其模擬結果顯示出 Anand模型和Modified-Anand模型在熱循環實驗測試下之潛變應變範圍存在差異。
  透過模擬應變速率效應及不同加熱循環負載曲線的響應來檢驗新模型的可行性,修改後的新模型不僅有助於擴大雙曲線模型的數據庫,其模擬也更符合諸多不同類型的封裝實驗結果。
Wafer Level Chip Scale Package (WLCSP) is one of the fastest growing segments in semiconductor packaging industry due to the rapid advances in integrated circuit (IC) fabrication, small form factor, and low cost. This technology results in a lower cost per die vs. traditional wire bond when the die count per wafer is high. As the number of I/O per die increases (and thus the die size and the distance to neutral point increases), the WLCSP faces issues in solder joint reliability due to current trend of large die WLCSP development, the ball fatigue reliability risk becomes more critical and challenging due to larger stress concentration caused by mismatch of coefficient of thermal expansion (CTE) in between silicon to PCB.
Accelerated thermal cycling (ATC) has been widely used in industry for microelectronic reliability lifetime assessment. In recent decades, as the rapid development of computing performance and simulation technique, the numerical approach is more and more frequently adopted by designers and believed to have its potential on tackling the issues related to electronic packages in the future. In this research work, the solder joint creep behaviour on WLCSP under thermal cycling loading will be studied in Finite Element Modelling with the help of Creep Models. This study will make use of an ultra large die, 14mm x 14mm full array WLCSP with 0.4mm ball pitch, 0.25mm ball size and 96.5Sn-3.5Agball material, as test vehicle and apply JEDEC compliant thermal cycling profile from −40 °C to 125 °C with 10 minutes of dwell time and 16.5°C minutes of ramp time for simulation result validation.
In recent years, some researchers have found huge altercations over the formulation of nine parameters in Anand Model to describe the stress-strain curve at nonlinear temperature dependent low strain levels available in field use conditions. Also this model has a scarcity for proper technical specifics while compared to that of Hyperbolic Sine model. Indeed, it has directed the development of several indigenous user defined creep models while their customized codes unavailable with many commercial Finite Element Tools. Therefore modifying the current Anand model to better valuate the reliability of the electronic packages has become an essential task.
In this study, a new Creep model was developed based on the assumptions of instantaneous Steady State creep form to pass up the evolution term, resulting in a creep equation with four parameters. Also the proposed model is very approachable due to its fundamental statement similar to that of well-known Hyperbolic Sine model. The creep strain range under both the models have been analysed for a better understanding of the creep behaviours of lead-free solder ball of WLCSP during thermal cycling loading. The simulation results show that there exists a variation in the creep strain range between the Anand model and Modified-Anand Model under the thermal cycling experimental test results.
The workability of the new model was examined by its competency to simulate the solder response for strain rate effect and different thermal cyclic loading profiles. Thus, it would contribute a huge assistance in broadening the database of hyperbolic model. On a better note, the Modified model yields a better agreement than Anand model with experimental results for different type of packages.
TABLE OF CONTENTS
ABSTRACT i
摘要 iii
TABLE OF CONTENTS v
LIST OF TABLES ix
LIST OF FIGURES x
CHAPTER 1 INTRODUCTION 1

1.1 Motivation of research 1
1.2 Literature Survey 4
1.2.1 Electronic Packaging Reliability Analysis 4
1.2.2 Constitutive Creep Model Analysis 5
1.3 Research Goal 8

CHAPTER 2 FUNDAMENTAL THERORIES 10

2.1 Theories on Non-Linearity 10
2.1.1 Geometric Nonlinearities 11
2.1.2 Material nonlinearities 11
2.2 Nonlinear Finite Element Equations 12
2.2.1 Incremental Solution Procedure 13
2.2.2 Newton – Raphson Method 13
2.2.3 Convergence Criteria 15
2.3 Creep Behaviour 16
2.3.1 Time-dependant Plasticity 16
2.3.2 Time-Independent Plasticity 17
2.3.3 Creep and Recovery 19
2.3.4 Relaxation 20
2.4 Constitutive Creep Models 21
2.4.1 Garofalo-Arrhenius Creep Theory 21
2.4.2 Anand’s Model (Unified Viscoplasticity Model) 23
2.5 Process of Modifying Anand Model into Modified Anand Model 25
2.6 Fatigue Model for Solder Joints 26
2.6.1 Strain Based Predictive Model 26
2.6.2 Energy Density Method 27
2.6.3 Modified Energy Density Method 28
2.7 Accelerated Thermal Cyclic Loading 29

CHAPTER 3 THERMAL CYCLIC LOADING OF THE WAFER LEVEL CHIP
SCALE PACKAGE 31

3.1 Wafer Level Chip Scale Package 31
3.1.1 Test WLCSP Structure 33
3.1.2 Thermal Cyclic Loading Experimentation 34

CHAPTER 4 FINITE ELEMENT ANALYSIS OF THE WAFER LEVEL
CHIP SCALE PACKAGE 37

4.1 Finite Element Model of the WLCSP 37
4.1.1 Finite Element Model Build-Up and Material Parameters
Setting 38
4.1.2 Boundary Conditions 42
4.2 Accelerated Thermal Cyclic Profile 43

CHAPTER 5 FEASIBILITY EVALUATION OF MODIFIED ANAND
MODEL FOR SAC SODLERS 45

5.1 Analysis of Creep Behaviour in the Constitutive Models 45
5.1.1 Creep Strain and Plastic Strain from the Simulation 45
5.2 Evaluation of Modified Anand Model with different Anand Model
Parameters 46
5.3 Causes for the variation of Strains between the Creep Models 48
5.4 Experimentation of Modified Anand Model with different types
of Solder Composition (SnAgCu) 49
5.5 Outcomes of the Feasibility Study using the Creep Models 52
5.6 Investigation of Primary Creep in Anand Model during Simulation 52
5.7 Estimation of Primary Creep 55
5.8 Onset of Steady-State Creep 57

CHAPTER 6 CONCLUSION AND RECOMMENDATIONS 59

6.1 Conclusions 59
6.2 Recommendations 61


REFERENCE 62
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