鑒於半導體製造業的成熟，愈來愈多的消費性電子產品朝著輕巧便宜但性能更好的方向進行。近年來，行動通訊與智慧型裝置更進一步強化了這個潮流並形成了複雜的產業鏈。為了增進使用者體驗並帶來更多的收益，通訊系統的革新與速度提升成為各設備製造商的主要標的。而高資料率傳輸的需求則可透過高頻率操作的裝置達成。
V與W頻帶通訊系統未竟的發展潛能是熱門的研究課題。前者有電機電子工程學會(IEEE)制定的高速無線區域網路(wireless local area networks, WLAN)規範─IEEE 802.11ad與IEEE 802.15，因保密性與高速的特性，將預期成為下一世代的主流通訊。而後者則由於尚未有明確規範限制且作為成像系統所擁有的高解析度，顯現出龐大的可能性。
此論文探討了三個功率結合技術的功率放大器設計，旨在使用90奈米互補式金屬氧化物半導體(Complementary Metal-Oxide-Semiconductor, CMOS)製程實現更大的輸出功率。第一個設計操作在W頻帶，而其餘兩個則在V頻帶使用。第一個設計具有13.2 dB的功率增益與最大的功率附加效率3.2%，且1-dB輸出功率壓縮點為9.1 dBm。在第二個設計中，多模切換的設計被用以提升低頻的效率；其輸出飽和功率與最高功率附加效率各為9.6 dBm與8.4%。最後一個設計則使用可節省晶片面積的放射狀變壓器功率結合結合器配置。根據模擬結果，可實現14.1 dBm的1-dB輸出功率壓縮點，在最大功率增益達18.6 dB情況下有11.5 GHz的3-dB頻寬。

Thanks to the mature semiconductor manufacturing, more and more consumer electronics become smaller and inexpensive but still remains high performance. Recently, the mobile communication and smart devices further promote the trend and form the complex industry chains. The innovation and speed boosting of the communication system becomes a main target for the device manufacturers, for it could provide better user experience and bring more income. To satisfy the requirement of higher data rate, it is a reasonable choice to operate the devices at high frequency.
V- and W-band are the popular research topics in the communicate systems due to the unexplored development potential. Regarding the former, the IEEE 802.11ad and IEEE 802.15 are proposed for high-speed wireless local area networks (WLAN) and they are expected to be the mainstream communication of the next generation with their security and high-speed. The latter reveals the huge possibilities for the license-free and high resolution of imaging system.
In this thesis, three power amplifiers (PAs) are proposed with power combining techniques for larger output power in a 90-nm CMOS process. The first (work I) is designed to operate at W-band and the others are for V-band. In work I, it achieves a simulated power gain of 13.2 dB, a maximum power-added-efficiency (PAE) of 3.2%, and an output 1-dB compression point (OP1dB) of 9.1 dBm. In work II, multi-mode scheme for enhancing the low power efficiency is used, and the output saturation power (Psat) and peak PAE are 9.6 dBm and 8.4%, respectively. The last work shows a radial symmetric transformer combiner arrangement, which could reduce the chip area. It achieves a simulated OP1dB of 14.1 dBm and a maximum power gain of 18.6 dB with 3-dB bandwidth 11.5 GHz.

摘要 i
ABSTRACT ii
Contents iii
List of Figures vi
List of Table xi
Chapter 1 Introduction 1
1.1. Introduction to Millimeter-Wave 1
1.2. V-band Standards and Applications 2
1.3. W-band Standards and Applications 4
1.4. Thesis Organization 4
Chapter 2 Passive and Active Components 6
2.1. LC Resonant Matching 6
2.1.1 Inductor Mathematical Model 6
2.1.2 Inductor Electromagnetic Analysis 8
2.1.3 Capacitor Electromagnetic Analysis 12
2.2. Transformer Matching 16
2.2.1 Transformer Mathematical Model 16
2.2.2 Transformer Electromagnetic Analysis 20
2.3. 90-nm CMOS Process 22
Chapter 3 Overview of Power Amplifier 27
3.1. Introduction 27
3.1.1 General Wireless Transceivers 27
3.1.2 Large Signal Impedance Matching 29
3.2. Important Parameters for Power Amplifier 32
3.2.1 Stability 32
3.2.2 Power Gain 36
3.2.3 Linearity 36
3.2.4 Efficiency 41
Chapter 4 A W-Band Power Amplifier with Multi Mode Switching and Transformer Power Combining Technique 44
4.1. Literature Survey 44
4.1.1 Transistor Performance Compensation 45
4.1.2 Efficiency Improvement 47
4.1.3 Power Combiner 48
4.2. Circuit Design 51
4.2.1 Design Flow 51
4.2.2 Active Device Considerations 52
4.2.3 Load Tuning 54
4.2.4 Impedance Matching 55
4.2.5 Design Parameters 59
4.3. Simulation and Measurement Results 61
4.3.1 Small-Signal Results 63
4.3.2 Large-Signal Results 65
4.4. Discussion and Conclusion 66
Chapter 5 A V-Band Power Amplifier with Combining Technique 70
5.1. Literature Survey 70
5.1.1 Radial Power Combining 70
5.1.2 Multi-Mode Switching 72
5.2. Circuit Design of Work II 73
5.2.1 Radial Power Combiner 73
5.2.2 Effective Size Manipulation 75
5.2.3 Impedance Matching 76
5.2.4 Design Parameters 80
5.3. Simulation and Measurement Results of Work II 82
5.3.1 Simulation Result 83
5.3.2 Measurement Result 84
5.4. Circuit Design of Work III 87
5.4.1 Radial Power Combiner 87
5.4.2 Impedance Matching 89
5.4.3 Design Parameters 92
5.5. Simulation Results of Work III 94
5.5.1 Small-Signal Results 95
5.5.2 Large-Signal Results 97
5.6. Discussion and Conclusion 98
Chapter 6 Conclusion and Future Work 101
Reference 102

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