人體感測器系統是一種特殊的無線感測器網路，其中包括各種微型生物感測器，而這些生物感測器主要用於人體體內以持續監測生物醫學信號。為了能持續監測生物醫學信號，壓縮演算法對於降低生物信號資料量並進行長時間監測來說是非常重要。在這次的研究當中，我們提出了兩種心電圖信號壓縮演算法。第一種壓縮算法稱為自適應壓縮感知（CS）/近精確壓縮（NPC）壓縮算法，其設計集合了CS和NPC的優點，以實現高CR和高SNR的壓縮演算法。第二種設計是涉及多個導程壓縮的可穿戴式裝置，其裝置支持多個導程壓縮並允許用戶在無損壓縮(lossless)和有損壓縮(lossy)之間切換，並且可以控制位元壓縮率(BCR)和功率消耗以達到低成本的微型壓縮器。最後在這次的研究中利用TSMC0.18μm CMOS製程技術來實現晶片並驗證所提出方法的可行性以及效能評估。

The body sensor system is a special class of wireless sensor network and comprises a variety of miniature biosensors. These biosensors are employed in the body to continuously monitor biomedical signals. In order to monitor biomedical signals continuously, compression algorithm is very important to reduce biomedical signal data for long time monitoring. In this study, we proposed two types compressions algorithm of Electrocardiogram (ECG) signal. First compression algorithm is referred to as the adaptive Compressed Sensing (CS)/ near-precise compressed (NPC) compression algorithm, which is designed integrating the advantages of CS and NPC to achieve high CR and high SNR. The second design of compressions algorithm is referred a wearable device involving multiple leads compression which supporting multiple leads compressed and allows users to switch between lossless and lossy compression, and the bits-compressed ratio (BCR) and power consumption can be controlled to achieve low-cost micro compressor. The effectiveness of the proposed approach was verified and evaluated by fabricating a chip using TSMC 0.18 μm CMOS technology.

I.Introduction................1
II.Adaptive Integration of CS and NPC Compression Algorithm.....4
2.1 Proposed Architecture......5
2.1.1 Compressed Sensing......6
Measurement Matrix......7
Discrete Cosine Transform (DCT)......8
2.1.2 Near-Precise Compressed Algorithm......9
2.1.3 Adaptive Compression Algorithm Integrating CS and NPC......11
2.2 Simulation Comparison......13
Discussion......17
2.3 Chip Implementation......19
2.4 Brief Conclusion......20
III. Multiple Leads With a Switch Mode for Lossless and Lossy Compression......21
3.1 Proposed Architecture......22
3.2 Simulation Results......28
3.3 Chip Implementation......34
3.3.1 Measurement result......36
3.3.2 Comparison......37
3.4 Brief Conclusion......41
IV. Conclusion......41
V. Future work ......43
Reference ......44

 

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